ZTE Corporation ZM8300G 用户手册
ZTE ZM8300G Module Hardware User Manual
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Figure 3-5
Sequence timing of Hard reset
For the design of the RESET_N pin, two schemes are available, namely, being controlled
by an AP on the system board or being enabled by a button. Figure 3-6 illustrates the two
schemes.
AP
ZM8300
b
c
e
RESET_N
Ⅰ
Ⅱ
S1
S2
2.2KΩ
1KΩ
Figure 3-6 Schemes for Controlling the Hardware Reset of the ZM8300G Module
3.4.4
WAKEUP_IN Signal
WAKEUP_IN is used to wake up module,default state is low level.when the pin is drived
from low to high,which wake up the module.note that when AP control module to wake
up,the high level should be at least 100ms.the anti-dithering for signal should be
considered, parallel capacitor is suggested to add near the pin.