Murata Electronics North America XDM2140 用户手册
7.0 Boot Sequence
Following the active low assertion of /RESET IN, the XDM2140 completes its boot-up process by loading
and decrypting the application image and loading the operating parameters. During the boot process, the
modules output signals are not actively driven and the input signals are ignored. The duration of the boot
process is defined in Table 10.
and decrypting the application image and loading the operating parameters. During the boot process, the
modules output signals are not actively driven and the input signals are ignored. The duration of the boot
process is defined in Table 10.
Boot Parameter
Min
Typ
Max
Units
Comments
t
boot_delay
6
s
The time between power up and
serial interface availability
serial interface availability
Table 10
8.0 Hardware Interfaces
8.1 /RESET IN
When this signal is asserted low, the XDM2140 is hardware reset until the signal is de-asserted. Note
that the XDM2140 may also be reset using the mote serial command. If a system is designed to assert
/RESET IN after the XDM2140 has completed its boot process, it is recommended the module be placed
into deep sleep prior to assertion of the /RESET IN signal.
that the XDM2140 may also be reset using the mote serial command. If a system is designed to assert
/RESET IN after the XDM2140 has completed its boot process, it is recommended the module be placed
into deep sleep prior to assertion of the /RESET IN signal.
8.2 /TIME
The XDM2140 has the ability to deliver network-wide synchronized timestamps. The XDM2140 sends a
time packet through its serial interface when one of the following occurs:
time packet through its serial interface when one of the following occurs:
•
HDLC Get Parameter request for time/state is received.
•
Active-low /TIME signal is asserted.
Use of the /TIME input is optional but has the advantage of being more accurate. The value of the
timestamp is taken within approximately 1 ms of receiving a /TIME signal assertion. The XDM2140 will
send the time packet ot the local host microcontroller within 100 ms of the strobe. If the HDLC request is
used, due to packet processing the value of the timestamp may be captured several milliseconds after
receipt of the packet. The real time delivered to the sensor processor is relative to the real-time clock on
the Gateway, which serves as the Network Real Time Clock (NRTC). The time stamp skew across the
network is guaranteed to be within ±250 ms of the NRTC.
timestamp is taken within approximately 1 ms of receiving a /TIME signal assertion. The XDM2140 will
send the time packet ot the local host microcontroller within 100 ms of the strobe. If the HDLC request is
used, due to packet processing the value of the timestamp may be captured several milliseconds after
receipt of the packet. The real time delivered to the sensor processor is relative to the real-time clock on
the Gateway, which serves as the Network Real Time Clock (NRTC). The time stamp skew across the
network is guaranteed to be within ±250 ms of the NRTC.
H o s t
M i c r o c o n t r o l l e r
X D M 2 1 4 0
N e t w o r k
G a t e w a y
/ T I M E P i n o r
H D L C C o m m a n d
T i m e
P a c k e t
R F
N e t w o r k
Figure 3
Figure 4