Honeywell International Inc. 9PGTPL-100A 用户手册

Page 54

1 Mar 2006

TPL-100A Processor / Part No. 940-0530-001

Use or disclosure of information on this page is subject to the restrictions in the proprietary notice of this document.

The Mode S transponder contains BITE software. The BITE continuously monitors for 
transponder internal failures, transponder control unit failures, and ARINC 429 data 
failures. The ARINC 429 data link reports failure status to the MILACAS-FR Processor. 
The transponder reports failure status to the FAIL lamp on the transponder control unit 
through a discrete output signal.

The Mode S transponder receives 115 V ac or 28 V dc primary input power, and 26 V 
ac synchro altitude reference power from aircraft power sources. The transponder 
receives a suppression pulse from the MILACAS-FR Processor during TCAS 
transmissions.

(1) General

The information in this section gives a description of overall system operation 
including:

1

Detailed block diagram and description of input and output signals

2

TCAS failure monitoring.

NOTE: All information in this manual is always superseded by the latest engineering 

software and hardware documentation.

(2) Detailed Block Diagrams and Description of Input/Output Signals

Figure 7 is a block diagram of the overall system unit interconnects of the 
MILACAS-FR Processor. Table 17 describes the MILACAS-FR Processor input/output 
signals. The interconnect diagram, Figure 2002 in the Maintenance Practices section, 
provides specific interconnect pin numbers on the MILACAS-FR Processor. 
Figure 2002 also shows the pins on the Mode S transponders and indicators that 
connect to the MILACAS-FR Processor.

Total system interconnects for the Mode S transponder and control units are described 
in the applicable maintenance manual.

System interconnects into the optional PPI are described in the associated 
maintenance manual listed in Table Intro-1.