SolidRun Ltd MX6 用户手册
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SR-uSOM-MX6 Interfaces
SR-uSOM-MX6 External Interfaces
The MicroSOM incorporates 3 Hirose DF40 board to board headers.
The choice of the Hirose DF40 is due to the following:
Miniature (0.4m pitch)
Highly reliable manufacturer
Highly available (worldwide distribution channels)
Excellent signal integrity (supports 6Gbps). Contact Hirose or SolidRun for reliability
and test result data.
and test result data.
1.5mm to 4.0mm mating height (1.5mm to 3.0mm if using 70-pin Board-to-Board
header). SR-uSOM-MX6 headers are fixed and mating height is determined by carrier
implementation
header). SR-uSOM-MX6 headers are fixed and mating height is determined by carrier
implementation
The different board to board functionality is defined as follows:
Main 80pin B2B. Includes the following functionality:
o Main supply +3.3v to +5.0v in (5 pins)
o I/O supply +3.3V and SD2, SD3 supplies (can be fixed +3.3V or externally
o I/O supply +3.3V and SD2, SD3 supplies (can be fixed +3.3V or externally
switched +3.3V / 1.8V to support UHS-1)
o Ethernet MDI (4 differential pairs), LED activity or link (10/100/1000) and
Ethernet TCT
o SATA TX/RX (2 differential pairs)
o USB OTG and HOST (2 differential pairs)
o Various GPIOs and pins that can be muxed. By default it is configured to be
o USB OTG and HOST (2 differential pairs)
o Various GPIOs and pins that can be muxed. By default it is configured to be
2xI2C, PWM1..4, SPI 2, SD2 interface and USB enable.
Second 80pin B2B. The board to board exposes the following functionality:
o System power on reset
o HDMI 1.4 (4 differential pairs), CEC, +5V boosted I2C and HDMI HPD
o PCI express 2.0 (3 differential pairs include TX/RX and clock)
o USB OTG charge detect and USB OTG ID
o MIPI CSI 2 (3 differential pairs for solo / dual lite and 5 differential pairs for
o HDMI 1.4 (4 differential pairs), CEC, +5V boosted I2C and HDMI HPD
o PCI express 2.0 (3 differential pairs include TX/RX and clock)
o USB OTG charge detect and USB OTG ID
o MIPI CSI 2 (3 differential pairs for solo / dual lite and 5 differential pairs for
dual / quad versions)
o MIPI DSI (3 differential pairs)
o LVDS 0 (5 differential pairs)
o UART1 (typically used for main system debug port)
o Various GPIOs and pins that can be muxed. By default it is configured to be
o LVDS 0 (5 differential pairs)
o UART1 (typically used for main system debug port)
o Various GPIOs and pins that can be muxed. By default it is configured to be
AUD5 I2S interface, CCM CLKO1/CLKO2, SD2 voltage select, SPDIF out, USB
HOST / OTG over current indication.
HOST / OTG over current indication.
Third 70pin B2B. This board to board exposes the following functionality:
o Power management (EIM_WAIT, TAMPER, PMIC standby, MX6_ONOFF,
PMIC_ON_REQ)
o Boot mode override