Intel III Xeon 800 MHz 80526KZ800256 用户手册
产品代码
80526KZ800256
ELECTRICAL SPECIFICATIONS
19
NOTE
Unless otherwise noted, each specification applies to all Pentium® III Xeon™ processor at 700 MHz and 900 MHz.
Where differences exist between processors, look for the table entries identified by “FMB” in order to design a
Flexible Mother Board (FMB) capable of accepting the Pentium® III Xeon™ processor at 700 MHz and 900 MHz as
well as the Pentium® II Xeon™ processor and previous versions of the Pentium® III Xeon™ processor.
Where differences exist between processors, look for the table entries identified by “FMB” in order to design a
Flexible Mother Board (FMB) capable of accepting the Pentium® III Xeon™ processor at 700 MHz and 900 MHz as
well as the Pentium® II Xeon™ processor and previous versions of the Pentium® III Xeon™ processor.
Specifications are only valid while meeting specifications for case temperature, clock frequency and input voltages. Care
should be taken to read all notes associated with each parameter.
should be taken to read all notes associated with each parameter.
Table 5. Voltage Specifications
1
Symbol
Parameter
Min
Typ
Max
Unit
Notes
V
CCCORE (2.8V version)
V
CC
for 2.8V version processor
2.8
V
2,3,4
V
CCCORE (2.8V version)
Tolerance, Static
Processor core voltage static
tolerance at edge fingers
tolerance at edge fingers
-0.085
0.085
V 6
V
CCCORE (2.8V version)
Tolerance, Transient
Processor core voltage
transient tolerance at edge
fingers
transient tolerance at edge
fingers
-0.130
0.130
V 6
V
CCCORE
(5V/12Vversion)
V
CC
for 5V/12V version
processor
4.75
11.4
5.0
12.0
5.25
12.6
V 4,6,7,8
V
TT
AGTL+ Bus Termination
voltage
voltage
1.365 1.50
1.635
V 1.5V
±9%, 5
V
CC_SMB
SMBus
supply
voltage
3.135
3.3
3.465
V
3.3V
±5%, 9
±5%, 9
V
CC_TAP
TAP supply voltage
2.375
2.50
2.625
V
2.5V ±5%
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies and cache sizes. “FMB” is a suggested
design guideline for flexible motherboard design. Failure to adhere to the FMB guidelines may impact system upgradeability.
design guideline for flexible motherboard design. Failure to adhere to the FMB guidelines may impact system upgradeability.
2.
VCC_CORE
supplies the processor core. FMB refers to the range of set points for all Pentium® III Xeon™ processors.
3.
A variable voltage source should exist on systems in the event that a different voltage is required. See Section 3.5 for more
information. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz does not require a separate
information. The Pentium® III Xeon™ processor at 700 MHz and 900 MHz does not require a separate
VCC_L2
voltage.
4.
Use the Typical Voltage specification along with the tolerance specifications to provide correct voltage regulation to the processor.
5.
Vtt is 1.5 +/- 9% (AC & DC) when the measurement is bandwidth limited to 20 MHz and measured at the SC 330 connector pin on
the back (solder tail) side of the baseboard. This parameter is measured at the processor edge fingers. The SC330 connector is
specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF (maximum at 1 MHz), and an average
contact resistance over the 6 V
the back (solder tail) side of the baseboard. This parameter is measured at the processor edge fingers. The SC330 connector is
specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF (maximum at 1 MHz), and an average
contact resistance over the 6 V
TT
pins of 15 m
Ω maximum Z.
6.
These are the tolerance requirements, across a 20 MHz bandwidth, at the processor edge fingers. The requirements at the
processor edge fingers account for voltage drops (and impedance discontinuities) at the processor edge fingers and to the processor
core. Voltage must return to within the static voltage specification within 100 us after the transient event. The SC330 connector is
specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF (maximum at 1 MHz), and an average
contact resistance of 15m
processor edge fingers account for voltage drops (and impedance discontinuities) at the processor edge fingers and to the processor
core. Voltage must return to within the static voltage specification within 100 us after the transient event. The SC330 connector is
specified to have a pin self-inductance of 6.0 nH maximum, a pin-to-pin capacitance of 2 pF (maximum at 1 MHz), and an average
contact resistance of 15m
Ω maximum in order to function with the Intel® specified voltage regulator module (VRM 8.3). Contact
Intel® for testing details of these parameters. Not 100% tested. Specified by design characterization.
7.
Pentium® III Xeon™ processor at 700 MHz and 900 MHz 5V/12V version is to be operated by 5V or 12V, and is available for new
designs that do not provide compatibility with previous versions of the Pentium® III Xeon™ processor.
designs that do not provide compatibility with previous versions of the Pentium® III Xeon™ processor.
8.
5V and 12V are specified at
±5%. This parameter includes both static (noise & ripple) and transient tolerances at the edge fingers.
9.
Vcc_SMB must be connected to 3.3V power supply (even if the SMBus features are not used) in order for the processor to function
properly.
properly.