Kingston Technology 2GB DDR2 800MHz Kit HX6400D2LLK2/2G 产品宣传页
产品代码
HX6400D2LLK2/2G
Memory Module Specifications
KHX6400D2LLK2/2G
2GB (1GB 128M x 64-Bit x 2 pcs.)
PC2-6400 CL4 240-Pin DIMM Kit
PC2-6400 CL4 240-Pin DIMM Kit
Kingston.com
Document No. 4804406-001.C00 07/18/11 Page 1
DESCRIPTION
Kingston’s KHX6400D2LLK2/2G is a kit of two low-latency
128M x 64-bit 1GB (1024MB) DDR2-800 CL4 SDRAM (Syn-
chronous DRAM) memory modules, based on sixteen 64M x
8-bit DDR2 FBGA components per module. Total kit capac-
ity is 2GB (2048MB). Each module pair has been tested to
run at DDR2 800MHz at low latency timing of 4-4-4-12 at
2.0V. The SPD is programmed to JEDEC standard latency
667Mhz timing of 5-5-5-15 at 1.8V. Each 240-pin DIMM uses
gold contact fingers and requires +1.8V. The electrical and
mechanical specifications are as follows:
128M x 64-bit 1GB (1024MB) DDR2-800 CL4 SDRAM (Syn-
chronous DRAM) memory modules, based on sixteen 64M x
8-bit DDR2 FBGA components per module. Total kit capac-
ity is 2GB (2048MB). Each module pair has been tested to
run at DDR2 800MHz at low latency timing of 4-4-4-12 at
2.0V. The SPD is programmed to JEDEC standard latency
667Mhz timing of 5-5-5-15 at 1.8V. Each 240-pin DIMM uses
gold contact fingers and requires +1.8V. The electrical and
mechanical specifications are as follows:
SPECIFICATIONS
Clock Cycle Time (tCK) CL=5
3ns (min.) / 8ns (max.)
Row Cycle Time (tRC)
54ns (min.)
Command Time (tRFC)
Refresh to Active/Refresh
105ns
Row Active Time (tRAS)
39ns (min.) / 70,000ns (max.)
Single Power Supply of
+1.8V (+/- .1V)
Power
1.922 W (operating per module)
UL Rating
94 V - 0
Operating Temperature
0° C to 55° C
Storage Temperature
-55° C to +125° C
FEATURES
• Power supply : Vdd: 1.8V ± 0.1V, Vddq: 1.8V ± 0.1V
• Double-data-rate architecture; two data transfers per
• Double-data-rate architecture; two data transfers per
clock cycle
• Bidirectional data strobe(DQS)
• Differential clock inputs (CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 3, 4, 5 (clock)
• Burst Length: 4, 8 (Interleave/nibble sequential)
• Programmable Burst type (sequential & interleave)
• Timing Reference: 667MHz 5-5-5-15 at +1.8V / 800MHz
• Differential clock inputs (CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• Programmable Read latency 3, 4, 5 (clock)
• Burst Length: 4, 8 (Interleave/nibble sequential)
• Programmable Burst type (sequential & interleave)
• Timing Reference: 667MHz 5-5-5-15 at +1.8V / 800MHz
4-4-4-12 at +2.0V
• Edge aligned data output, center aligned data input
• Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
• Serial presence detect with EEPROM
• High Performance Heat Spreader
• PCB : Height 1.180” (30.00mm), double sided component
• Auto & Self refresh, 7.8us refresh interval (8K/64ms refresh)
• Serial presence detect with EEPROM
• High Performance Heat Spreader
• PCB : Height 1.180” (30.00mm), double sided component
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