Intermec 073294-001 用户手册

SPEED/RANGE/ 
GDRD 

FPGA out 

Speed select 

0 = 200 scans/ 
sec (EV10) 
0 = 500 scans/ 
sec (EL10) 
1 = 36 scans/ 
sec (EV10) 
1 = 65 scans/ 
sec (EL10) 

Speed select 

0 = 500 scans/ 
sec 
1 = 65 scans 
/sec 

TxD to scanner 

0 = 0 or space state 
1 = 1 or marking 
state 

TxD to scanner 
0 = 0 or space 
state 
1 = 1 or marking 
state

 

 

IMAGER_PIXCLK 

FPGA IO 

SPI clock to 
scanner (and 
scanner mode 
select) 

 

Scanner present 

0 = no scanner 
installed 
1 = scanner installed 

 

TRIG_AIM* 

HCR out 

1D/2D select 

0 = 2D 
1 = 1D 

Scanner reset 

Active-low 

Auto-Detect Enable 

0 = enable 
1 = disable 

Trigger to scanner 

Active-low 

SCAN_TRIG* 

FPGA_IO 

SPI data to 
scanner (and 
scanner mode 
select) 

 

Trigger from 
scanner  

Active-low 

 

IMAGER_SD0-7 FPGA 

in  

 

 

 

I2C_CLK, I2C_DAT 

PXA250 IO 

 

I2C scanner 
control 

 

 

 

Internal scanners and undecoded tethered scanners using the legacy “DBP” 
laser scanner interface are handled through count gathering logic in the 
FPGA. See the next table for scanners using this interface scheme.