Intel 2950M CW8064701487007 用户手册
产品代码
CW8064701487007
Datasheet, Volume 1
91
Signal Description
6.10
Error and Thermal Protection Signals
PRDY#
PRDY# is a processor output used by debug tools to determine
processor debug readiness.
O
Asynchronous
CMOS
PREQ#
PREQ# is used by debug tools to request debug operation of the
processor.
I
Asynchronous
CMOS
TCK
Test Clock: This signal provides the clock input for the
processor Test Bus (also known as the Test Access Port). TCK
must be driven low or allowed to float during power on Reset.
I
CMOS
TDI
Test Data In: This signal transfers serial test data into the
processor. TDI provides the serial input needed for JTAG
specification support.
I
CMOS
TDO
Test Data Out: This signal transfers serial test data out of the
processor. TDO provides the serial output needed for JTAG
specification support.
O
Open Drain
TMS
Test Mode Select: A JTAG specification support signal used by
debug tools.
I
CMOS
TRST#
Test Reset: This signal resets the Test Access Port (TAP) logic.
TRST# must be driven low during power on Reset.
I
CMOS
Table 6-12. Error and Thermal Protection Signals
Signal Name
Description
Direction/
Buffer Type
CATERR#
Catastrophic Error: This signal indicates that the system has
experienced a catastrophic error and cannot continue to operate.
The processor will set this for non-recoverable machine check
errors or other unrecoverable internal errors.
On the processor, CATERR# is used for signaling the following
On the processor, CATERR# is used for signaling the following
types of errors:
• Legacy MCERRs – CATERR# is asserted for 16 BCLKs.
• Legacy IERRs – CATERR# remains asserted until warm or
• Legacy IERRs – CATERR# remains asserted until warm or
cold reset.
O
CMOS
PECI
PECI (Platform Environment Control Interface): A serial
sideband interface to the processor, it is used primarily for
thermal, power, and error management.
I/O
Asynchronous
PROCHOT#
Processor Hot: PROCHOT# goes active when the processor
temperature monitoring sensor(s) detects that the processor has
reached its maximum safe operating temperature. This indicates
that the processor Thermal Control Circuit (TCC) has been
activated, if enabled. This signal can also be driven to the
processor to activate the TCC.
CMOS Input/
Open-Drain
Output
THERMTRIP#
Thermal Trip: The processor protects itself from catastrophic
overheating by use of an internal thermal sensor. This sensor is
set well above the normal operating temperature to ensure that
there are no false trips. The processor will stop all execution
when the junction temperature exceeds approximately 130
°C.
This is signaled to the system by the THERMTRIP# signal.
O
Asynchronous
CMOS
Table 6-11. Test Access Points (TAP) Signals (Sheet 2 of 2)
Signal Name
Description
Direction/
Buffer Type