Intel E7-8891 v2 CM8063601377422 用户手册

Intel

®

 Xeon

® 

Processor E7-2800/4800/8800 v2 Product Family

329

Datasheet Volume Two: Functional Description, February 2014

Internal DMA Channel Error Status Registers.

3:0

ROS_V

0x0

global_error_pointer:

Points to one of 8 possible sources of uncorrectable errors - DMA channels 0-

7 and DMA core errors - as the source of the first error. The DMA channel 

errors are logged in CHANERRx_INT registers and DMA core errors are 

logged in the DMAUNCERRSTS register. This register is only valid when the 

register group pointed to by this register has at least one unmasked error 

status bit set and this register is rearmed to load again once all the 

unmasked uncorrectable errors in the source pointed to by this field are 

cleared.
Value of 0x0 corresponds to channel#0, value of 0x1 corresponds to 

channel#1, and value of 0x8 corresponds to DMA core uncorrectable errors

31:19

RV

-

Reserved. 

18:18

RW1CS (Function 0-1)
RO (Function 2-7)

0x0

desccnterr: (Function 0-1)

The hardware sets this bit when it encounters a base descriptor 

that requires an extended descriptor (such as an XOR with 8 

sources), but DMACount indicates that the Base descriptor is 

the last descriptor that can be processed.

Reserved. (Function 2-7)

17:17

RW1CS (Function 0-1)
RO (Function 2-7)

0x0

xorqerr:

The hardware sets this bit when the Q validation part of the
XOR with Galois Field Multiply Validate operation fails.

Reserved. (Function 2-7)

16:16

RW1CS

0x0

crc_xorp_err:

The hardware sets this bit when a CRC Test operation or XOR 

Validity operation fails or when the P validation part of the XOR 

with Galois Field Multiply Validate operation fails.

15:15

RO

0x0

unaffil_err:

Unaffiliated Error. IIO never sets this bit

14:14

RO

0x0

unused:

13:13

RW1CS

0x0

int_cfg_err:

Interrupt Configuration Error. The DMA channel sets this bit 

indicating that the interrupt registers were not configured 

properly when the DMA channel attempted to generate an 

interrupt e.g. interrupt address is not 0xFEE.