Transcend CFast, 16GB TS16GCFX500I 用户手册

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Transcend CFast cards are designed to satisfy high performance requirements using a SATA 3Gb/s interface. As a 

removable device, it is easier to plug and remove in space-limited applications; such as thin-clients or industrial 

PCs. Complaint with CFast 1.0 standard, CFast is your best choice as an embedded SATA storage solution.＂ 

•  CFast Specification Version 1.0 Compliant 
•  Built-in 16bit/30bit 1KByte ECC (Error Correction Code) functionality 

ensures highly reliable of data transfer 

•  Global wear-leveling algorithm eliminate excessive write operation 

and extends product life. 

•  Suppot StaticDataRefresh & EarlyRetirement technology to 

monitor error bit level and react before data is corrupted. 

•  Fully compatible with devices and OS that support the SATA   

3Gb/s standard 

The controller supports static/dynamic wear leveling. When the host writes data, the controller will find and use the 

block with the lowest erase count among the free blocks. This is known as dynamic wear leveling. When the free 

blocks' erase count is higher than a threshold value plus data blocks', it will activate the static wear leveling, 

replacing the not so frequently used user blocks with the high erase count free blocks. 

Using 16bit/30bit BCH Error Correction Code with each channel, the controller can correct 16/30bit random bits per 

1024 byte data sector for SLC NAND flash. The hardware executes parity generation and error detection/correction 

The StaticDataRefresh feature functions well when the cells in a block are still healthy. As the block ages over 

time, it cannot reliably store charge anymore, EarlyRetirement enters the scene. EarlyRetirement works by 

moving the static data to another block (a health block) before the previously used block becomes completely 

incapable of holding charges for data. When the charge loss error level exceeds another threshold value (higher 

from that for StaticDataRefresh), the controller automatically moves its data to another block. In addition, the 

original block is then marked as a bad block, which prevents its further use, and thus the block enters the state of 

“EarlyRetirement.” 

Normally, ECC engine corrections are taken place without affecting the host normal operations. As time passes 

by, the number of error bits accumulated in the read transaction exceeds the correcting capability of the ECC 

engine, resulting in corrupted data being sent to the host. To prevent this, the controller monitors the error bit 

levels at each read operation; when it reaches the preset threshold value, the controller automatically performs 

data refresh to “restore” the correct charge levels in the cell. This implementation practically restores the data to 

its original, error-free state, and hence, lengthening the life of the data.