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8GB 1Rx4 1G x 72-Bit PC3L-12800
CL11 Registered w/Parity VLP 240-Pin DIMM

This document describes ValueRAM's 1G x 72-bit (8GB)

DDR3L-1600 CL11 SDRAM (Synchronous DRAM), low voltage,

registered w/parity, 1Rx4 ECC, VLP (very low profile) memory

module, based on eightenn 1G x 4-bit FBGA components. The

SPD is programmed to JEDEC standard latency DDR3-1600

timing of 11-11-11 at 1.35V or 1.5V. This 240-pin DIMM uses

gold contact fingers. The electrical and mechanical specifica-

tions are as follows:

•

JEDEC standard 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~

1.575V) Power Supply

•

VDDQ = 1.35V (1.28V ~ 1.45V) and 1.5V (1.425V ~ 1.575V)

•

800MHz fCK for 1600Mb/sec/pin

•

8 independent internal bank

•

Programmable CAS Latency: 11, 10, 9, 8, 7, 6

•

Programmable Additive Latency: 0, CL - 2, or CL - 1 clock

•

8-bit pre-fetch

•

Burst Length: 8 (Interleave without any limit, sequential with

starting address “000” only), 4 with tCCD = 4 which does not

allow seamless read or write [either on the fly using A12 or

MRS]

•

Bi-directional Differential Data Strobe

•

Internal(self) calibration : Internal self calibration through ZQ

pin (RZQ : 240 ohm ± 1%)

•

On Die Termination using ODT pin

•

On-DIMM thermal sensor (Grade B)

•

Average Refresh Period 7.8us at lower than TCASE 85°C,

3.9us at 85°C < TCASE < 95°C

•

Asynchronous Reset

•

PCB : Height 0.740” (18.75mm), double  sided  component

Memory Module Specifi cations

CL(IDD)

11 cycles

Row Cycle Time (tRCmin)

48.125ns (min.)

Refresh to Active/Refresh

260ns (min.)

Command Time (tRFCmin)

Row Active Time (tRASmin)

35ns (min.)

Maximum Operating Power

(1.35V) = TBD W*

UL Rating

94 V - 0

Operating Temperature

0

o

 C to 85

o

 C

Storage Temperature

-55

o

 C to +100

o

 C

*Power will vary depending on the SDRAM and
 Register/PLL used.

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