Intel E1200 BX80557E1200 用户手册
产品代码
BX80557E1200
Intel
®
Celeron
®
Processor on 0.13 Micron Process in the 478-Pin Package Datasheet
89
Features
specified maximum temperature and may affect the long-term reliability of the processor. In
addition, a thermal solution that is significantly under-designed may not be capable of cooling the
processor even when the TCC is active continuously. Refer to the Intel
addition, a thermal solution that is significantly under-designed may not be capable of cooling the
processor even when the TCC is active continuously. Refer to the Intel
®
Pentium
®
4 Processor
with 512-KB L2 Cache on 0.13 Micron Process Thermal Design Guide for information on
designing a thermal solution.
designing a thermal solution.
The duty cycle for the TCC, when activated by the Thermal Monitor, is factory configured and
cannot be modified. The Thermal Monitor does not require any additional hardware, software
drivers, or interrupt handling routines.
cannot be modified. The Thermal Monitor does not require any additional hardware, software
drivers, or interrupt handling routines.
The TCC may also be activated via On-Demand mode. If bit 4 of the ACPI Thermal Monitor
Control Register is written to a 1 the TCC will be activated immediately, independent of the
processor temperature. When using On-Demand mode to activate the TCC, the duty cycle of the
clock modulation is programmable via bits 3:1 of the same ACPI Thermal Monitor Control
Register. In automatic mode, the duty cycle is fixed, however in On-Demand mode, the duty cycle
can be programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-
Demand mode may be used while Automatic mode is enabled. However, if the system tries to
enable the TCC via On-Demand mode while automatic mode is enabled and a high temperature
condition exists, the duty cycle of the automatic mode will override the duty cycle selected by the
On-Demand mode.
Control Register is written to a 1 the TCC will be activated immediately, independent of the
processor temperature. When using On-Demand mode to activate the TCC, the duty cycle of the
clock modulation is programmable via bits 3:1 of the same ACPI Thermal Monitor Control
Register. In automatic mode, the duty cycle is fixed, however in On-Demand mode, the duty cycle
can be programmed from 12.5% on/ 87.5% off, to 87.5% on/12.5% off in 12.5% increments. On-
Demand mode may be used while Automatic mode is enabled. However, if the system tries to
enable the TCC via On-Demand mode while automatic mode is enabled and a high temperature
condition exists, the duty cycle of the automatic mode will override the duty cycle selected by the
On-Demand mode.
An external signal, PROCHOT# (processor hot) is asserted when the processor detects that its
temperature is at the thermal trip point. Bus snooping and interrupt latching are also active while
the TCC is active. The temperature at which the thermal control circuit activates is not user
configurable and is not software visible.
temperature is at the thermal trip point. Bus snooping and interrupt latching are also active while
the TCC is active. The temperature at which the thermal control circuit activates is not user
configurable and is not software visible.
Besides the thermal sensor and TCC, the Thermal Monitor feature also includes one ACPI register,
performance monitoring logic, bits in three model specific registers (MSR), and one I/O pin
(PROCHOT#). All are available to monitor and control the state of the Thermal Monitor feature.
Thermal Monitor can be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#.
performance monitoring logic, bits in three model specific registers (MSR), and one I/O pin
(PROCHOT#). All are available to monitor and control the state of the Thermal Monitor feature.
Thermal Monitor can be configured to generate an interrupt upon the assertion or de-assertion of
PROCHOT#.
If automatic mode is disabled, the processor will be operating out of specification. Regardless of
enabling of the automatic or On-Demand modes, in the event of a catastrophic cooling failure, the
processor will automatically shut down when the silicon has reached a temperature of
approximately 135 °C. At this point the system bus signal THERMTRIP# will go active and stay
active until RESET# has been initiated. THERMTRIP# activation is independent of processor
activity and does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage
(VCC) must be removed within the time frame defined in
enabling of the automatic or On-Demand modes, in the event of a catastrophic cooling failure, the
processor will automatically shut down when the silicon has reached a temperature of
approximately 135 °C. At this point the system bus signal THERMTRIP# will go active and stay
active until RESET# has been initiated. THERMTRIP# activation is independent of processor
activity and does not generate any bus cycles. If THERMTRIP# is asserted, processor core voltage
(VCC) must be removed within the time frame defined in
.