Texas Instruments CDCLVC1112EVM - CDCLVC1112 Evaluation Module CDCLVC1112EVM CDCLVC1112EVM 数据表
产品代码
CDCLVC1112EVM
User's Guide
SCAU042 – July 2010
Low Additive Phase Noise LVCMOS Clock Buffer
Evaluation Board
NEED ABSTRACT
Contents
1
General Description
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1.1
Features
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2
Signal Path and Control Circuitry
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3
Getting Started
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4
Power-Supply Connections
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5
Enabling/Disabling the Outputs
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6
Output Clock
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7
Bill of Materials
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8
Schematic
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9
References
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List of Figures
1
Schematic (Page 1 of 3)
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2
Schematic (Page 2 of 3)
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3
Schematic (Page 31 of 3)
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List of Tables
1
Bill of Materials
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1
General Description
The CDCLVC1112 is a high-performance, low additive phase noise LVCMOS clock buffer. It has one
LVCMOS input and twelve LVCMOS outputs. It has also an enable pin.
LVCMOS input and twelve LVCMOS outputs. It has also an enable pin.
This evaluation module (EVM) is designed to demonstrate the electrical performance of the
CDCLVC1112.Throughout this document, the acronym EVM and the phrases evaluation module and
evaluation board are synonymous with the CDCLVC1112 EVM.
CDCLVC1112.Throughout this document, the acronym EVM and the phrases evaluation module and
evaluation board are synonymous with the CDCLVC1112 EVM.
illustrates the CDCLVC1112
EVM.
For optimum performance, the board is equipped with 50
Ω
SMA connectors and well controlled 50
Ω
impedance microstrip transmission lines.
1.1
Features
•
Easy-to-use evaluation board to fan out low phase noise
•
Easy device setup
•
Enable pin configurable though jumper and SMA
•
Board powered at 3.3V
1
SCAU042 – July 2010
Low Additive Phase Noise LVCMOS Clock Buffer Evaluation Board
Copyright © 2010, Texas Instruments Incorporated