Microchip Technology IC MCU FLASH 4K PIC16LF88-I/P DIP-18 MCP PIC16LF88-I/P 数据表
产品代码
PIC16LF88-I/P
2002-2013 Microchip Technology Inc.
DS30487D-page 13
PIC16F87/88
FIGURE 2-3:
PIC16F88 REGISTER FILE MAP
Indirect addr.
(*)
TMR0
PCL
STATUS
FSR
PORTA
PORTB
PCLATH
INTCON
INTCON
PIR1
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
PCLATH
INTCON
PIE1
PCON
00h
01h
01h
02h
03h
03h
04h
05h
05h
06h
07h
08h
07h
08h
09h
0Ah
0Ah
0Bh
0Ch
0Ch
0Dh
0Eh
0Eh
0Fh
10h
11h
10h
11h
12h
13h
13h
14h
15h
15h
16h
17h
18h
17h
18h
19h
1Ah
1Ah
1Bh
1Ch
1Ch
1Dh
1Eh
1Eh
1Fh
80h
81h
82h
83h
82h
83h
84h
85h
85h
86h
87h
87h
88h
89h
8Ah
89h
8Ah
8Bh
8Ch
8Ch
8Dh
8Eh
8Eh
8Fh
90h
90h
91h
92h
93h
92h
93h
94h
95h
95h
96h
97h
97h
98h
99h
9Ah
99h
9Ah
9Bh
9Ch
9Ch
9Dh
9Eh
9Eh
9Fh
20h
A0h
7Fh
FFh
Bank 0
Bank 1
File
Address
Indirect addr.
(*)
Indirect addr.
(*)
PCL
STATUS
FSR
PCLATH
INTCON
PCL
STATUS
FSR
PCLATH
INTCON
100h
101h
101h
102h
103h
103h
104h
105h
105h
106h
107h
107h
108h
109h
10Ah
109h
10Ah
10Bh
180h
181h
182h
183h
182h
183h
184h
185h
185h
186h
187h
187h
188h
189h
189h
18Ah
18Bh
18Bh
Indirect addr.
(*)
TMR0
OPTION_REG
PIR2
PIE2
ADRESH
ADCON0
ADCON1
General
Purpose
Register
Register
accesses
70h-7Fh
TRISB
PORTB
96 Bytes
10Ch
10Dh
10Eh
10Fh
10Fh
110h
18Ch
18Dh
18Eh
18Fh
18Fh
190h
EEDATA
EEADR
EECON1
EECON2
EECON2
EEDATH
EEADRH
Reserved
(1)
Reserved
(1)
17Fh
1FFh
Bank 2
Bank 3
19Fh
1A0h
1A0h
11Fh
120h
120h
CVRCON
OSCCON
CMCON
ADRESL
TMR1L
TMR1H
T1CON
TMR2
CCPR1L
CCPR1H
CCP1CON
RCSTA
TXREG
TXREG
RCREG
PR2
TXSTA
SPBRG
T2CON
OSCTUNE
WDTCON
EFh
F0h
F0h
General
Purpose
Register
80 Bytes
Purpose
Register
80 Bytes
16Fh
170h
170h
General
Purpose
Register
80 Bytes
Purpose
Register
80 Bytes
1EFh
1F0h
1F0h
General
Purpose
Register
80 Bytes
Purpose
Register
80 Bytes
General
Purpose
Register
16 Bytes
Purpose
Register
16 Bytes
General
Purpose
Register
16 Bytes
Purpose
Register
16 Bytes
accesses
70h-7Fh
accesses
70h-7Fh
SSPBUF
SSPCON
SSPADD
SSPSTAT
ANSEL
File
Address
File
Address
File
Address
Unimplemented data memory locations, read as ‘0’.
*
Not a physical register.
Note 1:
This register is reserved, maintain this register clear.