Texas Instruments THS3115EVM Evaluation Module THS3115EVM THS3115EVM 数据表
产品代码
THS3115EVM
Inverting Stage (Channel 1) Operation
3-3
Circuit Design Examples
V
output
+
R
termination
R
g
R
termination
)
R
g
R
source
)
R
termination
R
g
R
termination
)
R
g
+
49.9
750
49.9
)
750
50
)
49.9
750
49.9
)
750
+
0.483 peak
This can also be viewed as the Thevenin equivalent voltage looking into
the source at J4 of the EVM.
the source at J4 of the EVM.
-
From the EVM side. The Thevenin equivalent resistance of the EVM plus
the source—looking towards the source from the inverting input of the op
amp is:
the source—looking towards the source from the inverting input of the op
amp is:
R
th
+
R
g
)
R
source
R
termination
R
source
)
R
termination
+
750
)
50
49.9
50
)
49.9
+
774.97
W
Therefore, the inverting gain on a 0.5-Vpeak ideal voltage source
(assumed to be embedded in the function generator) is:
(assumed to be embedded in the function generator) is:
V
output
+
–V
in
R
f
R
g
+
–0.5
750
774.97
+
–0.483 peak
The two results are identical and therefore equivalent.