Microchip Technology MCU PIC PIC18F87K22-I/PTRSL TQFP-80 MCP PIC18F87K22-I/PTRSL 数据表

 2009-2011 Microchip Technology Inc.

DS39960D-page 479

         

  

         

       

       

    

Syntax:

ADDWF      [k] {,d}

Operands:

0 

 k  95

d 

 [0,1]

Operation:

(W) + ((FSR2) + k) 

 dest

Status Affected:

N, OV, C, DC, Z

Encoding:

0010

01d0

kkkk

kkkk

Description:

The contents of W are added to the 
contents of the register indicated by 
FSR2, offset by the value ‘k’. 

If ‘d’ is ‘0’, the result is stored in W. If ‘d’ 
is ‘1’, the result is stored back in 
register ‘f’. 

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

Read ‘k’

Process 

Data

Write to

destination

Example:

ADDWF

[OFST] ,0

Before Instruction

W

=

17h

OFST

=

2Ch

FSR2

=

0A00h

Contents

of 0A2Ch

=

20h

After Instruction

W

=

37h

Contents

of 0A2Ch

=

20h

Syntax:

BSF   [k], b

Operands:

0 

 f  95

0 

 b  7

Operation:

1

 

 ((FSR2) + k)<b>

Status Affected:

None

Encoding:

1000

bbb0

kkkk

kkkk

Description:

Bit ‘b’ of the register indicated by FSR2, 
offset by the value ‘k’, is set.

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

Read

register ‘f’

Process 

Data

Write to

destination

Example:

BSF

[FLAG_OFST], 7

Before Instruction

FLAG_OFST

=

0Ah

FSR2

=

0A00h

Contents 

of 0A0Ah

=

55h

After Instruction

Contents

of 0A0Ah

=

D5h

Syntax:

SETF   [k]

Operands:

0 

 k  95

Operation:

FFh 

 ((FSR2) + k)

Status Affected:

None

Encoding:

0110

1000

kkkk

kkkk

Description:

The contents of the register indicated by 
FSR2, offset by ‘k’, are set to FFh. 

Words:

1

Cycles:

1

Q Cycle Activity:

Q1

Q2

Q3

Q4

Decode

Read ‘k’

Process 

Data

Write

register

Example:

SETF

[OFST]

Before Instruction

OFST

=

2Ch

FSR2

=

0A00h

Contents

of 0A2Ch

=

00h

After Instruction

Contents

of 0A2Ch

=

FFh