Texas Instruments TLV320AIC1106EVM-K Evaluation Module TLV320AIC1106EVM-K TLV320AIC1106EVM-K 数据表
产品代码
TLV320AIC1106EVM-K
Digital Interface
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Table 3. Digital Interface Pinout (continued)
PIN NUMBER
SIGNAL
DESCRIPTION
J3.12
NC
Not connected
J3.13
NC
Not connected
J3.14
RESET
Reset signal input
J3.15
NC
Not connected
J3.16
NC
Not connected
J3.17
NC
Not connected
J3.18
DGND
Digital ground
J3.19
NC
Not connected
J3.20
NC
Not connected
J4.1
NC
Not connected
J4.2
NC
Not connected
J4.3
SCLK
Audio serial data shift clock (input/output)
J4.4
DGND
Digital ground
J4.5
NC
Not connected
J4.6
NC
Not connected
J4.7
FS1
Audio serial data bus frame synchronization (input/output)
J4.8
NC
Not connected
J4.9
NC
Not connected
J4.10
DGND
Digital ground
J4.11
DIN
Audio serial data bus data Input (input)
J4.12
NC
Not connected
J4.13
DOUT
Audio serial data bus data output (output)
J4.14
NC
Not connected
J4.15
NC
Not connected
J4.16
NC
Not connected
J4.17
MCLK
Master clock input
J4.18
DGND
Digital ground
J4.19
NC
Not connected
J4.20
NC
Not connected
4
TLV320AIC1106EVM-K
SLAU328A – October 2010 – Revised January 2011
© 2010–2011, Texas Instruments Incorporated