Texas Instruments SN65HVD101 and SN65HVD102 Evaluation Module for IO-LINK PHY for Device Nodes SN65HVD101EVM SN65HVD101EVM 数据表
产品代码
SN65HVD101EVM
User's Guide
SLLU178 – February 2013
SN65HVD101 and SN65HVD102 EVM User's Guide
This user’s guide describes the SN65HVD101 and SN65HVD102 evaluation module (EVM). Hereafter in
this document, SN65HVD101 and SN65HVD102 will be referred to as SN65HVD10x. This EVM helps
designers evaluate the device performance, supporting the fast development and analysis of IO-Link
transmission systems using the SN65HVD10x IO-Link physical layer devices.
this document, SN65HVD101 and SN65HVD102 will be referred to as SN65HVD10x. This EVM helps
designers evaluate the device performance, supporting the fast development and analysis of IO-Link
transmission systems using the SN65HVD10x IO-Link physical layer devices.
Contents
1
Features
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2
EVM Overview
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2.1
Evaluating the SN65HVD10x
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3
EVM Setup and Precautions
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3.1
SN65HVD101 EVM Setup
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3.2
EVM Jumper Settings
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3.3
SN65HVD101 Schematic
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List of Figures
1
SN65HVD101 EVM Board
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2
SN65HVD101 EVM Board Layout
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3
IO-Link Application Example
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4
SN65HVD101 Schematic
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List of Tables
1
EVM Jumper Settings
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2
Status LEDs
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3
Bill Of Materials
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1
Features
The features of this EVM are listed below:
•
Configurable CQ Output: push-pull, high-side, or low-side for SIO mode
•
3.3-V and 5-V configurable integrated LDO (SN65HVD101 only)
•
Remote wake-up indicator
•
Current-limit indicator
•
Configurable current limits
•
9-V to 36-V supply range
•
Power Good indicator
•
Over-temperature protection
•
Reverse polarity protection
•
Tolerant to 50-V peak line voltage
•
20-pin QFN package, 3.5 mm × 4 mm
1
SLLU178 – February 2013
SN65HVD101 and SN65HVD102 EVM User's Guide
Copyright © 2013, Texas Instruments Incorporated