Texas Instruments XILINXPWR-079 Power Management Evaluation Module for Xilinx FPGAs XILINXPWR-079 XILINXPWR-079 数据表

XILINXPWR-079 (HPA-079) 

TPS64203 Switching DC/DC Controller-Based Power Management Solution for 

Spartan™-3 Providing up to 3 A from V

IN

 = 5.0 V or 3.3 V 

 
SUPPORTS : 
 

Spartan™-3 – supports PR213 at the following link: 

http://www-

s.ti.com/sc/techlit/slva174.pdf

 

 

Spartan™-II - board requires significant modification to support PR211 at the 
following link: 

http://www-s.ti.com/sc/techlit/slva172.pdf

 

 

Spartan™-IIE - board requires significant modification to support PR212 at the 
following link:  

http://www-s.ti.com/sc/techlit/slva173.pdf

 

 
FEATURES: 
 

Tiny SOT-23 switching DC/DC controller, U2, delivers up to 3 A at low cost. 

Easily customizable design allows for maximum cost control by: 

o

  Sizing Q3 for the amount of current up to 3 A to meet the application’s 

I

CCINT

 requirement, 

o

  Omitting current sense resistor R4 and connecting ISNS to the drain of Q3, 

o

  Selecting the linear regulator from the TPS79xxx family to meet the 

application’s I

CCO

 requirement. 

In-rush current (for charging decoupling capacitors and FPGA start- up) that 
places a demand on the input power supply is minimized by the use of  the: 

o

  External supervisory (SVS) IC, U1, which monitors the input rail and 

prevents the regulator from enabling until the input bulk capacitors (not 
shown in the schematic) are fully charged.  

o

  Integrated soft-start of U2 

o

  Soft-start circuit consisting of the external PMOS transistor Q4 and 

supporting passive components to provide 10 ms rise time for V

CCO

 

o

  Sequential sequencing of V

CCINT, 

V

CCAUX

 then V

CCO

 

§  the discrete SVS circuit formed by bipolar transistors Q1 and Q2 

and supporting passives enables the V

CCAUX

 regulator, U3 

§  V

CCAUX

 enables the V

CCO

 regulator, U4 

The design meets Xilinx’s V

CCINT

 and V

CCO

 start- up profile requirements, where 

applicable, including monotonic voltage ramp, in-rush current and power voltage 
ramp time requirements.  

 
IMPORTANT WEB LINKS: 
 

Link to the TI home page for Xilinx FPGA power management solutions at 
http://www.ti.com/xilinxfpga for more information and other reference designs.