Texas Instruments OPA653EVM Evaluation Module OPA653EVM OPA653EVM 数据表
产品代码
OPA653EVM
OP
A653
OPA653
V
OUT
V
IN-
V
IN+
160 W
49.9 W
160 W
49.9 W
0.1 F
m
10 F
m
0.1 F
m
10 F
m
+6 V
-
6 V
50-W
Load
50-W
Source
V
S+
V
S-
6
3
0
3
6
9
12
15
-
-
-
-
-
-
18
SignalGain(dB)
100 k
1 M
10 M
100 M
1 G
Frequency (Hz)
V = 200 mV
O
PP
SMALL-SIGNAL FREQUENCY RESPONSE
NONINVERTING GAIN OF +2 V/V
50-
TEST ENVIRONMENT
W
www.ti.com
SBOS348A – DECEMBER 2008 – REVISED NOVEMBER 2009
Wideband, Fixed Gain, JFET-Input AMPLIFIER
Check for Samples:
1
FEATURES
DESCRIPTION
23
•
HIGH BANDWIDTH: 500 MHz (G = +2 V/V)
The
OPA653
combines
a
very
wideband
voltage-feedback
operational
amplifier
with
a
•
HIGH SLEW RATE: 2675 V/
μ
s (4-V Step)
JFET-input stage with internal gain setting resistors to
•
EXCELLENT THD: –71dBc at 10 MHz
achieve an ultra-high, dynamic-range amplifier for
•
LOW INPUT VOLTAGE NOISE: 6.1 nV/
√
Hz
fixed gain of +2-V/V or –1-V/V applications.
•
FAST OVERDRIVE RECOVERY: 8 ns
The 500-MHz wide gain of +2-V/V bandwidth is
•
FAST SETTLING TIME (1% 4-V Step): 7.9 ns
complemented by a very high 2675-V/
μ
s slew rate
and
fast
settling
time
that
make
it
ideal
for
•
LOW INPUT OFFSET VOLTAGE: ±1 mV
time-domain and pulse-oriented applications.
•
LOW INPUT BIAS CURRENT: ±10 pA
Excellent –72-dBc THD distortion performance at
•
HIGH INPUT IMPEDANCE: 10
12
Ω
||2.5 pF
10 MHz makes the OPA653 an excellent choice for
•
INTERNAL GAIN SETTING RESISTORS:
frequency-domain and FFT analysis applications.
G = +2 V/V or G = –1 V/V
Additionally, with the low 6.1-nV/
√
Hz voltage noise,
•
HIGH OUTPUT CURRENT: 70 mA
low bias current, and high impedance JFET input, it
supports very low noise, wideband, high input
supports very low noise, wideband, high input
APPLICATIONS
impedance
applications.
Examples
include
•
TEST AND MEASUREMENT FRONT-END
high-impedance probes, data acquisition cards, and
•
HIGH-INPUT IMPEDANCE PROBES
oscilloscope front-ends.
•
DATA ACQUISITION CARDS
RELATED
•
OSCILLOSCOPE INPUT
OPERATIONAL AMPLIFIER
•
ADC INPUT AMPLIFIER
PRODUCTS
VOLTAGE
SLEW
BW
RATE
NOISE
AMPLIFIER
DEVICE
V
S
(V)
(MHz)
(V/
μ
s)
(nV/
√
Hz)
DESCRIPTION
Unity-Gain
+5
200
300
5.80
Stable CMOS
Unity-Gain
±5
500
290
7
Stable
JFET-Input
Gain of +7
±5
350
700
4.8
Stable
JFET-Input
Unity-Gain
±6
650
2550
8.9
Stable
JFET-Input
Unity-Gain
±15
105
900
7
Stable
JFET-Input
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
PowerPAD is a trademark of Texas Instruments.
3
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008–2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.