Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X 数据表
产品代码
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Deferral Check
When this bit is set, the deferral check function is enabled in the MAC.
When the transmit state machine is deferred for more than 24,288 bit
times, the MAC issues a Frame Abort status, and sets the excessive
deferral error bit (
times, the MAC issues a Frame Abort status, and sets the excessive
deferral error bit (
EXDEFF
) in the MAC MMC Transmit Interrupt
(EMACMMCTXRIS) Register.
If the Jumbo frame mode (
JFEN
) is enabled, the threshold for deferral
is 155,680 bits times. Deferral begins when the transmitter is ready to
transmit, but is prevented because of an active carrier sense signal
(CRS) on the MII.
transmit, but is prevented because of an active carrier sense signal
(CRS) on the MII.
The defer time is not cumulative. For example, if the transmitter defers
for 10,000 bit times because the CRS signal is active and then the CRS
signal becomes inactive, the transmitter transmits and collision happens.
Because of collision, the transmitter needs to back off and then defer
again after back off completion. In such a scenario, the deferral timer
is reset to 0 and it is restarted.
for 10,000 bit times because the CRS signal is active and then the CRS
signal becomes inactive, the transmitter transmits and collision happens.
Because of collision, the transmitter needs to back off and then defer
again after back off completion. In such a scenario, the deferral timer
is reset to 0 and it is restarted.
When this bit is clear, the deferral check function is disabled and the
EMAC defers until the CRS signal goes inactive.
EMAC defers until the CRS signal goes inactive.
Note:
This bit is only applicable in half-duplex mode.
Description
Value
Deferral check function is disabled.
0
Deferral check function is enabled.
1
0x0
RW
DC
4
Transmitter Enable
When this bit is set, the transmit state machine of the MAC is enabled
for transmission on the MII.
for transmission on the MII.
When this bit is clear, the MAC transmit state machine is disabled after
the completion of the transmission of the current frame, and does not
transmit any further frames.
the completion of the transmission of the current frame, and does not
transmit any further frames.
Description
Value
MAC transmit state machine is disabled.
0
MAC transmit state machine is enabled.
1
0x0
RW
TE
3
Receiver Enable
When this bit is set, the receiver state machine of the MAC is enabled
for receiving frames from the MII.
for receiving frames from the MII.
When this bit is clear, the MAC receive state machine is disabled after
completion of the reception of the current frame, and does not receive
any further frames from the MII.
completion of the reception of the current frame, and does not receive
any further frames from the MII.
Description
Value
MAC receive state machine is disabled.
0
MAC receive state machine is enabled.
1
0x0
RW
RE
2
1667
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller