Texas Instruments 10A, 12V Input, 1.8V Output Synchronous Buck Converter using the TPS40192 and NexFET MOSFETs TPS40192E TPS40192EVM-525 数据表
产品代码
TPS40192EVM-525
Schematic
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Test Point
Label
Use
Section
TP7
GND
Ground for SW, LDRV, and HDRV measurements
3.3.4
TP8
HDRV
Monitor high-side gate drive (Q2)
3.3.4
TP9
SW
Monitor switch-node waveforms
3.3.4
TP10
LDRV
Monitor low-side gate drive (Q3)
3.3.4
TP11
GND
Ground for loop-monitoring probe
3.3.5
TP12
CH1
Loop injection point and injection monitoring point
3.3.5
TP13
CH2
Loop injection point and output response monitoring point
3.3.5
TP14
GND
Ground for loop-monitoring probe
3.3.5
TP15
Vout+
Monitor output voltage from the module
3.3.6
TP16
Vout–
Monitor output voltage from the module
3.3.6
TP17
Power Good
Power-good output voltage
3.3.7
TP18
Ext Source
External source for power-good circuit
3.3.7
TP19
GND
Ground for external source for power good
3.3.7
TP20
Prebias
Injection point to test prebias load compliance
3.3.8
3.3.1
Input Voltage Monitoring (TP1 and TP2)
TPS40192EVM-525 provides two test points for measuring the voltage applied to the module. This allows
the user to measure the actual module voltage without losses from input cables and connector losses. All
input voltage measurements should be made between TP1 and TP2. To use TP1 and TP2, connect a
voltmeter positive terminal to TP1 and the negative terminal to TP2.
the user to measure the actual module voltage without losses from input cables and connector losses. All
input voltage measurements should be made between TP1 and TP2. To use TP1 and TP2, connect a
voltmeter positive terminal to TP1 and the negative terminal to TP2.
3.3.2
Disable (TP3 and TP4)
TPS40192EVM-525 defaults to the Enabled state. Short TP4 to TP3 to disable the TPS40192 controller.
TP4 also can be used as a Disable input driven by a 5-V logic input from an external circuit. The Enable
test point uses two 5.1-k
TP4 also can be used as a Disable input driven by a 5-V logic input from an external circuit. The Enable
test point uses two 5.1-k
Ω
pulldown resistors in series so that TPS40192 turns on if the Enable test point
is left floating.
3.3.3
Compensation and Initialization (TP6)
TPS40192EVM-525 provides a test-point connection to the COMP pin of the TPS40192 controller. This
test point can be used to monitor the COMP voltage during the controller's power-on initialization that sets
the controller's short-circuit protection (SCP) threshold. The test point also can be used to monitor the
PWM comparator input voltage (COMP) during operation or to measure the power-stage gain by following
the loop-analysis procedure in section 4.5.
test point can be used to monitor the COMP voltage during the controller's power-on initialization that sets
the controller's short-circuit protection (SCP) threshold. The test point also can be used to monitor the
PWM comparator input voltage (COMP) during operation or to measure the power-stage gain by following
the loop-analysis procedure in section 4.5.
3.3.4
Switching Waveforms (TP7, TP8, TP9, and TP10)
TPS40192EVM-525 provides three test points and a local ground connection (TP7) for the monitoring of
the main switching waveforms. Connect an oscilloscope probe to TP8 to monitor the high-side gate drive
applied to the gate of Q2. Connect an oscilloscope probe to TP9 to monitor the switch-node voltage. The
gate-to-source voltage (VGS) of the high-side FET can be determined by a math function TP8–TP9 if both
channels use the same scale. Connect an oscilloscope probe to TP9 to monitor the low-side gate drive
applied to the gate of Q3. Because the source of Q3 is connected directly to ground, no math function is
required to determine the gate-to-source voltage of the low-side FET.
the main switching waveforms. Connect an oscilloscope probe to TP8 to monitor the high-side gate drive
applied to the gate of Q2. Connect an oscilloscope probe to TP9 to monitor the switch-node voltage. The
gate-to-source voltage (VGS) of the high-side FET can be determined by a math function TP8–TP9 if both
channels use the same scale. Connect an oscilloscope probe to TP9 to monitor the low-side gate drive
applied to the gate of Q3. Because the source of Q3 is connected directly to ground, no math function is
required to determine the gate-to-source voltage of the low-side FET.
3.3.5
Loop Analysis (TP11, TP12, TP13, and TP14)
TPS40192EVM-525 contains a 49.9-
Ω
series resistor in the feedback loop to allow for matched
impedance signal injection into the feedback for loop-response analysis. An isolation transformer should
be used to apply a small (30-mV or less) signal across R14 through TP12 and TP13. By monitoring the
AC injection level at TP13 and the returned AC level at TP14, the power-supply loop response can be
determined.
be used to apply a small (30-mV or less) signal across R14 through TP12 and TP13. By monitoring the
AC injection level at TP13 and the returned AC level at TP14, the power-supply loop response can be
determined.
6
Using the TPS40192EVM-525, A 12-V Input, 1.8-V Output, 10-A Synchronous
SLUU395 – December 2009
Buck Converter
Copyright © 2009, Texas Instruments Incorporated