Texas Instruments Evaluation Board for High-Speed Dual Op Amp in the 8-Pin SOIC PSOP Package LMH730121/NOPB LMH730121/NOPB 数据表
产品代码
LMH730121/NOPB
2001 National Semiconductor Corporation www.national.com
8-pin Thermally Enhanced SOIC (PSOP)
Dual Op Amp Evaluation Board
Part Number CLC730121
.
June 2001
The CLC730121 evaluation board is designed to aid in the characterization of National’s 8-pin Dual Op Amps in PSOP
package. This board uses all surface-mount components for maximum speed and performance.
Figure 1 shows the schematic:
package. This board uses all surface-mount components for maximum speed and performance.
Figure 1 shows the schematic:
Figure 1: Complete Evaluation Board Schematic
This board is designed with versatility in mind; that is, by selective insertion of components, the device can be put into an
Inverting, non-inverting, or differential configuration. In addition, single supply operation can be tested with simple board
modifications (please see below).
Inverting, non-inverting, or differential configuration. In addition, single supply operation can be tested with simple board
modifications (please see below).
Please note that R11 is installed on the circuit side of the board in order to minimize its lead lengths. C5-8 (4 places) are
de-coupling caps essential to be installed for good high frequency behavior. 0.1
de-coupling caps essential to be installed for good high frequency behavior. 0.1
µ
F and 6.8
µ
F are good values in most
cases. Note that C7-8 are polar caps. Use Tantalum capacitors for lowest ESR.
The CLC730121 evaluation board uses a thermally dissipating pad soldered to the exposed die attach paddle (DAP) of
the device under test (DUT) to enable heat transfer out of the package. Normally this DAP would be soldered during
manufacturing with a process like vapor phase. For lab evaluation, use a thermally conductive epoxy or thermal grease
between the DAP and the board to help conduct heat out of the package.
the device under test (DUT) to enable heat transfer out of the package. Normally this DAP would be soldered during
manufacturing with a process like vapor phase. For lab evaluation, use a thermally conductive epoxy or thermal grease
between the DAP and the board to help conduct heat out of the package.
SINGLE SUPPLY OPERATION:
In order to allow maximum flexibility, it is possible to test the Op Amp in a single supply arrangement as well. To do so,
R16, R17, and C9 can be installed to form a “virtual ground” which would be tied to the non-inverting terminal as biasing.
A convenient way to connect C9 (positive side) to the inputs is by performing the following:
R16, R17, and C9 can be installed to form a “virtual ground” which would be tied to the non-inverting terminal as biasing.
A convenient way to connect C9 (positive side) to the inputs is by performing the following:
1. Cut R7 and R10 connection to ground plane, on circuit side.
2. Install 0
2. Install 0
Ω
resistances for R7 and R10
3. Tie C9 (positive side) to the cut side of R7 and R10.