Microchip Technology MCP3425EV 数据表

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页码 38
MCP3425
DS22072B-page 4
© 2009 Microchip Technology Inc.
TEMPERATURE SPECIFICATIONS
Offset Error
V
OS
30
µV
Tested at PGA = 1
V
DD
 = 5.0V and DR = 15 SPS
Offset Drift vs. Temperature
300
nV/°C
V
DD
 = 5.0V
Common-Mode Rejection 
100
dB
at DC and PGA =1,
105
dB
at DC and PGA =8,
T
A
 = +25°C
Gain vs. V
DD
5
ppm/V
T
A
 = +25°C, V
DD
 = 2.7V to 5.5V,
PGA = 1
Power Supply Rejection at DC 
95
dB
T
A
 = +25°C, V
DD
 = 2.7V to 5.5V,
PGA = 1
Power Requirements
Voltage Range
V
DD
2.7
5.5
V
Supply Current during 
Conversion
I
DDA
155
190
µA
V
DD 
= 5.0V
145
µA
V
DD
 = 3.0V
Supply Current during Standby 
Mode
I
DDS
0.1
0.5
µA
I
2
C Digital Inputs and Digital Outputs
High level input voltage
V
IH
0.7 V
DD
V
DD
V
Low level input voltage
V
IL
0.3V
DD
V
Low level output voltage
V
OL
0.4
V
I
OL
 = 3 mA, V
DD
 = +5.0V
Hysteresis of Schmitt Trigger 
for inputs (Note 7)
V
HYST
0.05V
DD
V
f
SCL
 = 100 kHz
Supply Current when I
2
C bus 
line is active
I
DDB
10
µA
Input Leakage Current
I
ILH
1
µA
V
IH
 = 5.5V
I
ILL
-1
µA
V
IL
 = GND
Pin Capacitance and I
2
C Bus Capacitance
Pin capacitance 
C
PIN
10
pF
I
2
C Bus Capacitance
C
b
400
pF
Electrical Characteristics: Unless otherwise indicated, T
A
 = -40°C to +85°C, V
DD
 = +5.0V, V
SS
 = 0V.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
TA
-40
+85
°C
Operating Temperature Range
T
A
-40
+125
°C
Storage Temperature Range
T
A
-65
+150
°C
Thermal Package Resistances
Thermal Resistance, 6L SOT-23
θ
JA
190.5
°C/W
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all parameters apply for T
A
 = -40°C to +85°C, V
DD
 = +5.0V, V
SS
 = 0V,
V
IN
+ = V
IN
- = V
REF
/2. All ppm units use 2*V
REF
 as full-scale range.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Note
1:
Any input voltage below or greater than this voltage causes leakage current through the ESD diodes at the input pins.
This parameter is ensured by characterization and not 100% tested.
2:
This input impedance is due to 3.2 pF internal input sampling capacitor. 
3:
The total conversion speed includes auto-calibration of offset and gain.
4:
INL is the difference between the endpoints line and the measured code at the center of the quantization band.
5:
Includes all errors from on-board PGA and V
REF
.
6:
Full Scale Range (FSR) = 2 x 2.048/PGA = 4.096/PGA.
7:
This parameter is ensured by characterization and not 100% tested.
8:
This parameter is ensured by design and not 100% tested.