Texas Instruments ADC12C105 Evaluation Board ADC12C105EB/NOPB ADC12C105EB/NOPB 数据表
产品代码
ADC12C105EB/NOPB
AGND
V
A
AGND
V
A
V
A
V
A
V
A
V
A
AGND
AGND
V
A
AGND
SNAS417B – MAY 2007 – REVISED AUGUST 2007
Pin Descriptions and Equivalent Circuits
Pin No.
Symbol
Equivalent Circuit
Description
ANALOG I/O
5
V
IN
+
Differential analog input pins. The differential full-scale input signal
level is 2V
level is 2V
P-P
with each input pin signal centered on a common mode
6
V
IN
-
voltage, V
CM
.
2
V
RP
32
V
CMO
These pins should each be bypassed to AGND with a low ESL
(equivalent series inductance) 0.1 µF capacitor placed very close to
the pin to minimize stray inductance. A 0.1 µF capacitor should be
placed between V
(equivalent series inductance) 0.1 µF capacitor placed very close to
the pin to minimize stray inductance. A 0.1 µF capacitor should be
placed between V
RP
and V
RN
as close to the pins as possible, and a
1 µF capacitor should be placed in parallel.
V
V
RP
and V
RN
should not be loaded. V
CMO
may be loaded to 1mA for
1
V
RN
use as a temperature stable 1.5V reference.
It is recommended to use V
It is recommended to use V
CMO
to provide the common mode
voltage, V
CM
, for the differential analog inputs, V
IN
+ and V
IN
−
.
Reference Voltage. This device provides an internally developed
1.2V reference. When using the internal reference, V
1.2V reference. When using the internal reference, V
REF
should be
decoupled to AGND with a 0.1 µF and a 1 µF low equivalent series
31
V
REF
inductance (ESL) capacitor .
This pin may be driven with an external 1.2V reference voltage.
This pin should not be used to source or sink current.
This pin may be driven with an external 1.2V reference voltage.
This pin should not be used to source or sink current.
This is a four-state pin controlling the input clock mode and output
data format.
OF/DCS = V
data format.
OF/DCS = V
A
, output data format is 2's complement without duty
cycle stabilization applied to the input clock
OF/DCS = AGND, output data format is offset binary, without duty
OF/DCS = AGND, output data format is offset binary, without duty
12
OF/DCS
cycle stabilization applied to the input clock.
OF/DCS = (2/3)*V
OF/DCS = (2/3)*V
A
, output data is 2's complement with duty cycle
stabilization applied to the input clock
OF/DCS = (1/3)*V
OF/DCS = (1/3)*V
A
, output data is offset binary with duty cycle
stabilization applied to the input clock.
Copyright © 2007, Texas Instruments Incorporated
3
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