Microchip Technology DV164136 数据表
© 2008 Microchip Technology Inc.
DS39646C-page 403
PIC18F8722 FAMILY
FIGURE 28-10:
RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER AND
POWER-UP TIMER TIMING
POWER-UP TIMER TIMING
FIGURE 28-11:
BROWN-OUT RESET TIMING
TABLE 28-12: RESET, WATCHDOG TIMER, OSCILLATOR START-UP TIMER, POWER-UP TIMER
AND BROWN-OUT RESET REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Typ
Max
Units
Conditions
30
TmcL
MCLR Pulse Width (low)
2
—
—
μs
31
T
WDT
Watchdog Timer Time-out Period
(no postscaler)
(no postscaler)
3.4
4.0
4.6
ms
32
T
OST
Oscillation Start-up Timer Period
1024 T
OSC
—
1024 T
OSC
—
T
OSC
= OSC1 period
33
T
PWRT
Power-up Timer Period
55.6
64
75
ms
34
T
IOZ
I/O High-Impedance from MCLR
Low or Watchdog Timer Reset
Low or Watchdog Timer Reset
—
2
—
μs
35
T
BOR
Brown-out Reset Pulse Width
200
—
—
μs
V
DD
≤ B
VDD
(see D005)
36
T
IRVST
Time for Internal Reference
Voltage to become Stable
Voltage to become Stable
—
20
50
μs
37
T
LVD
High/Low-Voltage Detect Pulse Width
200
—
—
μs
V
DD
≤ V
HLVD
38
T
CSD
CPU Start-up Time
—
10
—
μs
39
T
IOBST
Time for INTOSC to Stabilize
—
1
—
μs
V
DD
MCLR
Internal
POR
PWRT
Time-out
Oscillator
Time-out
Internal
Reset
Watchdog
Timer
Reset
33
32
30
31
34
I/O pins
34
Note:
Refer to Figure 28-5 for load conditions.
V
DD
BV
DD
35
V
BGAP
= 1.2V
V
IRVST
Enable Internal
Internal Reference
36
Reference Voltage
Voltage Stable