Microchip Technology MA240017 数据表
2008-2011 Microchip Technology Inc.
DS39927C-page 227
PIC24F16KA102 FAMILY
TABLE 29-9:
DC CHARACTERISTICS: I/O PIN INPUT SPECIFICATIONS
DC CHARACTERISTICS
Standard Operating Conditions: 1.8V to 3.6V (unless otherwise stated)
Operating temperature
Operating temperature
-40°C
T
A
+85°C for Industrial
-40°C
T
A
+125°C for Extended
Param
No.
Sym
Characteristic
Min
Typ
Max
Units
Conditions
V
IL
Input Low Voltage
(
)
—
—
—
—
DI10
I/O Pins
V
SS
—
0.2 V
DD
V
DI15
MCLR
V
SS
—
0.2 V
DD
V
DI16
OSCI (XT mode)
V
SS
—
0.2 V
DD
V
DI17
OSCI (HS mode)
V
SS
—
0.2 V
DD
V
DI18
I/O Pins with I
2
C™ Buffer
V
SS
—
0.3 V
DD
V
SMBus disabled
DI19
I/O Pins with SMBus Buffer
V
SS
—
0.8
V
SMBus enabled
V
IH(
Input High Voltage
)
—
—
—
—
DI20
I/O Pins:
with Analog Functions
Digital Only
with Analog Functions
Digital Only
0.8 V
DD
0.8 V
DD
—
—
—
V
DD
V
DD
V
V
V
DI25
MCLR
0.8 V
DD
—
V
DD
V
DI26
OSCI (XT mode)
0.7 V
DD
—
V
DD
V
DI27
OSCI (HS mode)
0.7 V
DD
—
V
DD
V
DI28
I/O Pins with I
2
C Buffer:
with Analog Functions
Digital Only
Digital Only
0.7 V
DD
0.7 V
DD
—
—
—
V
DD
V
DD
V
V
V
DI29
I/O Pins with SMBus
2.1
—
V
DD
V
2.5V
V
PIN
V
DD
DI30
I
CNPU
CNx Pull-up Current
50
250
500
A
V
DD
= 3.3V, V
PIN
= V
SS
I
IL
Input Leakage
Current
Current
(
,
DI50
I/O Ports
—
0.050
±0.100
A
V
SS
V
PIN
V
DD
,
Pin at high-impedance
DI51
V
REF
+, V
REF
-, AN0, AN1
—
0.300
±0.500
A
V
SS
V
PIN
V
DD
,
Pin at high-impedance
DI55
MCLR
—
—
±5.0
A
V
SS
V
PIN
V
DD
DI56
OSCI
—
—
±5.0
A
V
SS
V
PIN
V
DD
,
XT and HS modes
Note 1:
Data in “Typ” column is at 3.3V, 25°C unless otherwise stated. Parameters are for design guidance only
and are not tested.
and are not tested.
2:
The leakage current on the MCLR pin is strongly dependent on the applied voltage level. The specified
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
levels represent normal operating conditions. Higher leakage current may be measured at different input
voltages.
3:
Negative current is defined as current sourced by the pin.
4:
Refer to
for I/O pin buffer types.
5:
V
IH
requirements are met when internal pull-ups are enabled.