Microchip Technology MA240017 数据表
PIC24F16KA102 FAMILY
DS39927C-page 234
2008-2011 Microchip Technology Inc.
TABLE 29-22: AC SPECIFICATIONS
TABLE 29-23: A/D CONVERSION TIMING REQUIREMENTS
(
)
Symbol
Characteristics
Min
Typ
Max
Units
T
LW
BCLKx High Time
20
T
CY
/2
—
ns
T
HW
BCLKx Low Time
20
(T
CY
* BRGx) + T
CY
/2
—
ns
T
BLD
BCLKx Falling Edge Delay from UxTX
-50
—
50
ns
T
BHD
BCLKx Rising Edge Delay from UxTX
T
CY
/2 – 50
—
T
CY
/2 + 50
ns
T
WAK
Min. Low on UxRX Line to Cause Wake-up
—
1
—
s
T
CTS
Min. Low on UxCTS Line to Start
Transmission
Transmission
T
CY
—
—
ns
T
SETUP
Start bit Falling Edge to System Clock Rising
Edge Setup Time
Edge Setup Time
3
—
—
ns
T
STDELAY
Maximum Delay in the Detection of the
Start bit Falling Edge
Start bit Falling Edge
—
—
T
CY
+ T
SETUP
ns
A/D CHARACTERISTICS
Standard Operating Conditions: 1.8V to 3.6V
(unless otherwise stated)
Operating temperature
(unless otherwise stated)
Operating temperature
-40°C
T
A
+85°C for Industrial
-40°C
T
A
+125°C for Extended
Param
No.
Symbol
Characteristic
Min.
Typ
Max.
Units
Conditions
Clock Parameters
AD50
T
AD
A/D Clock Period
75
—
—
ns
T
CY
= 75 ns, AD1CON3
is in the default state
AD51
T
RC
A/D Internal RC Oscillator Period
—
250
—
ns
Conversion Rate
AD55
T
CONV
Conversion Time
—
12
—
T
AD
AD56
F
CNV
Throughput Rate
—
—
500
ksps
AV
DD
2.7V
AD57
T
SAMP
Sample Time
—
1
—
T
AD
AD58
T
ACQ
Acquisition Time
750
—
—
ns
(Note
)
AD59
T
SWC
Switching Time from Convert to
Sample
Sample
—
—
(Note
AD60
T
DIS
Discharge Time
0.5
—
—
T
AD
Clock Parameters
AD61
T
PSS
Sample Start Delay from Setting
Sample bit (SAMP)
Sample bit (SAMP)
2
—
3
T
AD
Note 1:
Because the sample caps will eventually lose charge, clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures.
performance, especially at elevated temperatures.
2:
The time for the holding capacitor to acquire the “New” input voltage when the voltage changes full scale
after the conversion (V
after the conversion (V
DD
to V
SS
or V
SS
to V
DD
).
3:
On the following cycle of the device clock.