Microchip Technology MA330017 数据表

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页码 330
© 2007-2012 Microchip Technology Inc.
DS70283K-page 213
dsPIC33FJ32MC202/204 and dsPIC33FJ16MC304
FCKSM<1:0>
FOSC
Immediate Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
IOL1WAY
FOSC
Immediate Peripheral pin select configuration
1 = Allow only one reconfiguration
0 = Allow multiple reconfigurations
OSCIOFNC
FOSC
Immediate OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
POSCMD<1:0>
FOSC
Immediate Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
FWDTEN
FWDT
Immediate Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
Clearing the SWDTEN bit in the RCON register will have no effect.)
0 = Watchdog Timer enabled/disabled by user software (LPRC can be dis-
abled by clearing the SWDTEN bit in the RCON register)
WINDIS
FWDT
Immediate Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
WDTPRE
FWDT
Immediate Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
WDTPOST<3:0>
FWDT
Immediate Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384



0001 = 1:2
0000 = 1:1
PWMPIN
FPOR
Immediate Motor Control PWM Module Pin Mode bit
1 = PWM module pins controlled by PORT register at device Reset 
(tri-stated)
0 = PWM module pins controlled by PWM module at device Reset
(configured as output pins)
TABLE 21-2:
CONFIGURATION BITS DESCRIPTION (CONTINUED)
Bit Field
Register
RTSP 
Effect
Description