Microchip Technology MA330026 数据表
2011-2014 Microchip Technology Inc.
DS70000652F-page 197
dsPIC33FJ16(GP/MC)101/102 AND dsPIC33FJ32(GP/MC)101/102/104
16.0
SERIAL PERIPHERAL
INTERFACE (SPI)
INTERFACE (SPI)
The Serial Peripheral Interface (SPI) module is a
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices can be serial EEPROMs, shift regis-
ters, display drivers, Analog-to-Digital Converters, etc.
The SPI module is compatible with SPI and SIOP from
Motorola
synchronous serial interface useful for communicating
with other peripheral or microcontroller devices. These
peripheral devices can be serial EEPROMs, shift regis-
ters, display drivers, Analog-to-Digital Converters, etc.
The SPI module is compatible with SPI and SIOP from
Motorola
®
.
Each SPI module consists of a 16-bit shift register,
SPIxSR (where x = 1 or 2), used for shifting data in and
out, and a buffer register, SPIxBUF. A control register,
SPIxCON, configures the module. Additionally, a status
register, SPIxSTAT, indicates status conditions.
SPIxSR (where x = 1 or 2), used for shifting data in and
out, and a buffer register, SPIxBUF. A control register,
SPIxCON, configures the module. Additionally, a status
register, SPIxSTAT, indicates status conditions.
The serial interface consists of four pins:
• SDIx (serial data input)
• SDOx (serial data output)
• SCKx (shift clock input or output)
• SSx (active-low slave select).
• SDOx (serial data output)
• SCKx (shift clock input or output)
• SSx (active-low slave select).
In Master mode operation, SCKx is a clock output. In
Slave mode, it is a clock input.
Slave mode, it is a clock input.
FIGURE 16-1:
SPIx MODULE BLOCK DIAGRAM
Note 1: This data sheet summarizes the features
of the dsPIC33FJ16(GP/MC)101/102
and dsPIC33FJ32(GP/MC)101/102/104
family devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Serial Peripheral Inter-
face (SPI)” (DS70206) in the “dsPIC33/
PIC24 Family Reference Manual”, which
is available from the Microchip web site
(
and dsPIC33FJ32(GP/MC)101/102/104
family devices. It is not intended to be a
comprehensive reference source. To
complement the information in this data
sheet, refer to “Serial Peripheral Inter-
face (SPI)” (DS70206) in the “dsPIC33/
PIC24 Family Reference Manual”, which
is available from the Microchip web site
(
www.microchip.com
).
2: Some registers and associated bits
described in this section may not be
available on all devices. Refer to
available on all devices. Refer to
in
this data sheet for device-specific register
and bit information.
and bit information.
Internal Data Bus
SDIx
SDOx
SSx
SCKx
SPIxSR
bit 0
Shift Control
Edge
Select
F
CY
Primary
1:1/4/16/64
Enable
Prescaler
SPIxBUF
Transfer
Transfer
Write SPIxBUF
Read SPIxBUF
16
SPIxCON1<1:0>
SPIxCON1<4:2>
Master Clock
Clock
Control
Secondary
Prescaler
1:1 to 1:8
SPIxRXB
SPIxTXB
Control
Sync