Microchip Technology MCP1630DM-DDBS1 数据表
©
2007 Microchip Technology Inc.
DS41211D-page 79
PIC12F683
11.3.1
PWM PERIOD
The PWM period is specified by the PR2 register of
Timer2. The PWM period can be calculated using the
formula of Equation 11-1.
Timer2. The PWM period can be calculated using the
formula of Equation 11-1.
EQUATION 11-1:
PWM PERIOD
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set. (Exception: If the PWM duty
cycle = 0%, the pin will not be set.)
• The PWM duty cycle is latched from CCPR1L into
CCPR1H.
11.3.2
PWM DUTY CYCLE
The PWM duty cycle is specified by writing a 10-bit
value to multiple registers: CCPR1L register and
DC1B<1:0> bits of the CCP1CON register. The
CCPR1L contains the eight MSbs and the CCP1<1:0>
bits of the CCP1CON register contain the two LSbs.
CCPR1L and DC1B<1:0> bits of the CCP1CON
register can be written to at any time. The duty cycle
value is not latched into CCPR1H until after the period
completes (i.e., a match between PR2 and TMR2
registers occurs). While using the PWM, the CCPR1H
register is read-only.
value to multiple registers: CCPR1L register and
DC1B<1:0> bits of the CCP1CON register. The
CCPR1L contains the eight MSbs and the CCP1<1:0>
bits of the CCP1CON register contain the two LSbs.
CCPR1L and DC1B<1:0> bits of the CCP1CON
register can be written to at any time. The duty cycle
value is not latched into CCPR1H until after the period
completes (i.e., a match between PR2 and TMR2
registers occurs). While using the PWM, the CCPR1H
register is read-only.
Equation 11-2 is used to calculate the PWM pulse
width.
width.
Equation 11-3 is used to calculate the PWM duty cycle
ratio.
ratio.
EQUATION 11-2:
PULSE WIDTH
EQUATION 11-3:
DUTY CYCLE RATIO
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
The 8-bit timer TMR2 register is concatenated with
either the 2-bit internal system clock (F
either the 2-bit internal system clock (F
OSC
), or 2 bits of
the prescaler, to create the 10-bit time base. The system
clock is used if the Timer2 prescaler is set to 1:1.
clock is used if the Timer2 prescaler is set to 1:1.
When the 10-bit time base matches the CCPR1H and 2-
bit latch, then the CCP1 pin is cleared (see Figure 11-1).
bit latch, then the CCP1 pin is cleared (see Figure 11-1).
11.3.3
PWM RESOLUTION
The resolution determines the number of available duty
cycles for a given period. For example, a 10-bit resolution
will result in 1024 discrete duty cycles, whereas an 8-bit
resolution will result in 256 discrete duty cycles.
cycles for a given period. For example, a 10-bit resolution
will result in 1024 discrete duty cycles, whereas an 8-bit
resolution will result in 256 discrete duty cycles.
The maximum PWM resolution is 10 bits when PR2 is
255. The resolution is a function of the PR2 register
value as shown by Equation 11-4.
255. The resolution is a function of the PR2 register
value as shown by Equation 11-4.
EQUATION 11-4:
PWM RESOLUTION
TABLE 11-2:
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
OSC
= 20 MHz)
TABLE 11-3:
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS (F
OSC
= 8 MHz)
Note:
The Timer2 postscaler (see Section 7.0
“Timer2 Module”) is not used in the
determination of the PWM frequency.
“Timer2 Module”) is not used in the
determination of the PWM frequency.
PWM Period
PR2
(
) 1
+
[
] 4 T
OSC
•
•
•
=
(TMR2 Prescale Value)
Note:
If the pulse width value is greater than the
period the assigned PWM pin(s) will
remain unchanged.
period the assigned PWM pin(s) will
remain unchanged.
Pulse Width
CCPR1L:CCP1CON<5:4>
(
)
•
=
T
OSC
• (TMR2 Prescale Value)
Duty Cycle Ratio
CCPR1L:CCP1CON<5:4>
(
)
4 PR2
1
+
(
)
-----------------------------------------------------------------------
=
Resolution
4 PR2
1
+
(
)
[
]
log
2
( )
log
------------------------------------------ bits
=
PWM Frequency
1.22 kHz
4.88 kHz
19.53 kHz
78.12 kHz
156.3 kHz
208.3 kHz
Timer Prescale (1, 4, 16)
16
4
1
1
1
1
PR2 Value
0xFF
0xFF
0xFF
0x3F
0x1F
0x17
Maximum Resolution (bits)
10
10
10
8
7
6.6
PWM Frequency
1.22 kHz
4.90 kHz
19.61 kHz
76.92 kHz
153.85 kHz
200.0 kHz
Timer Prescale (1, 4, 16)
16
4
1
1
1
1
PR2 Value
0x65
0x65
0x65
0x19
0x0C
0x09
Maximum Resolution (bits)
8
8
8
6
5
5