Microchip Technology MCP1630DM-DDBS1 数据表
©
2007 Microchip Technology Inc.
DS41211D-page 97
PIC12F683
TABLE 12-8:
SUMMARY OF REGISTERS ASSOCIATED WITH WATCHDOG TIMER
REGISTER 12-2:
WDTCON: WATCHDOG TIMER CONTROL REGISTER
U-0
U-0
U-0
R/W-0
R/W-1
R/W-0
R/W-0
R/W-0
—
—
—
WDTPS3
WDTPS2
WDTPS1
WDTPS0
SWDTEN
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7-5
Unimplemented: Read as ‘
0
’
bit 4-1
WDTPS<3:0>: Watchdog Timer Period Select bits
Bit Value = Prescale Rate
0000
= 1:32
0001
= 1:64
0010
= 1:128
0011
= 1:256
0100
= 1:512 (Reset value)
0101
= 1:1024
0110
= 1:2048
0111
= 1:4096
1000
= 1:8192
1001
= 1:16384
1010
= 1:32768
1011
= 1:65536
1100
= Reserved
1101
= Reserved
1110
= Reserved
1111
= Reserved
bit 0
SWDTEN: Software Enable or Disable the Watchdog Timer
(1)
1
= WDT is turned on
0
= WDT is turned off (Reset value)
Note 1:
If WDTE Configuration bit =
1
, then WDT is always enabled, irrespective of this control bit. If WDTE
Configuration bit =
0
, then it is possible to turn WDT on/off with this control bit.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on
all other
Resets
WDTCON
—
—
—
WDTPS3 WDTPS2 WSTPS1 WDTPS0 SWDTEN
---0 1000
---0 1000
OPTION_REG
GPPU
INTEDG
T0CS
T0SE
PSA
PS2
PS1
PS0
1111 1111
1111 1111
CONFIG
CPD
CP
MCLRE
PWRTE
WDTE
FOSC2
FOSC1
FOSC0
—
—
Legend:
Shaded cells are not used by the Watchdog Timer.
Note
1:
See Register 12-1 for operation of all Configuration Word register bits.