Microchip Technology ARD00385 数据表

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页码 570
PIC18F87K90 FAMILY
DS39957D-page 180
 2009-2011 Microchip Technology Inc.
11.10 PORTJ, TRISJ and 
LATJ Registers
PORTJ is an 8-bit wide, bidirectional port. The
corresponding Data Direction and Output Latch registers
are TRISJ and LATJ.
All pins on PORTJ are implemented with Schmitt
Trigger input buffers. Each pin is individually
configurable as an input or output. 
All PORTJ pins, except RJ0, are multiplexed with LCD
segment drives controlled by the LCDSE4 register. I/O
port functions are only available on these pins when the
segments are disabled.
Each of the PORTJ pins has a weak internal pull-up. A
single control bit can turn off all the pull-ups. This is
performed by clearing bit RJPU (PADCFG1<5>). The
weak pull-up is automatically turned off when the port
pin is configured as an output. The pull-ups are
disabled on any device Reset.
EXAMPLE 11-9:
INITIALIZING PORTJ      
Note:
PORTJ is available only on 80-pin devices.
Note:
These pins are configured as digital inputs
on any device Reset.
CLRF
PORTJ
;
  Initialize PORTJ by
; clearing output latches
CLRF
LATJ
; Alternate method
; to clear output latches
MOVLW
 
0CFh
;
  Value used to 
; initialize data       
             
; direction
MOVWF
 
TRISJ
;
  Set RJ3:RJ0 as inputs
; RJ5:RJ4 as output
;
  RJ7:RJ6 as inputs