Freescale Semiconductor StarterTRAK USB for Automotive Safety Applications TRK-USB-MPC5643L TRK-USB-MPC5643L 数据表
产品代码
TRK-USB-MPC5643L
MPC5643L Microcontroller Data Sheet, Rev. 9
Package pinouts and signal descriptions
Freescale Semiconductor
24
Figure 3. MPC5643L 257 MAPBGA pinout (top view)
and
provide the pin function summaries for the 144-pin and 257-pin packages, respectively, listing all the
signals multiplexed to each pin.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
A
V
SS_HV
_IO
V
SS_HV
_IO
V
DD_HV
_IO
H[2]
H[0]
G[14]
D[3]
C[15]
V
DD_HV
_IO
A[12]
H[10]
H[14]
A[10]
B[2]
C[10]
V
SS_HV
_IO
V
SS_HV
_IO
B
V
SS_HV
_IO
V
SS_HV
_IO
B[6]
A[14]
F[3]
A[9]
D[4]
D[0]
V
SS_HV
_IO
H[12]
E[15]
E[14]
B[3]
F[13]
B[0]
V
DD_HV
_IO
V
SS_HV
_IO
C
V
DD_HV
_IO
NC
1
1
NC = Not connected (the pin is physically not connected to anything on the device)
V
SS_HV
_IO
FCCU_
F[1]
D[2]
A[13]
V
DD_HV
_REG_2
V
DD_HV
_REG_2
I[0]
JCOMP
H[11]
I[1]
F[14]
B[1]
V
SS_HV
_IO
A[4]
F[12]
D
F[5]
F[4]
A[15]
C[6]
V
SS_LV_
COR
V
DD_LV_
COR
F[0]
V
DD_HV
_IO
V
SS_HV
_IO
NC
A[11]
E[13]
F[15]
V
DD_HV
_IO
V
PP
_TEST
D[14]
G[3]
E
MDO0
F[6]
D[1]
NMI
NC
C[14]
G[2]
I[3]
F
H[1]
G[12]
A[7]
A[8]
V
DD_LV_
COR
V
DD_LV_
COR
V
DD_LV_
COR
V
DD_LV_
COR
V
DD_LV_
COR
V
DD_LV_
COR
V
DD_LV_
COR
NC
C[13]
I[2]
G[4]
G
H[3]
V
DD_HV
_IO
C[5]
A[6]
V
DD_LV_
COR
V
SS_LV_
COR
V
SS_LV_
COR
V
SS_LV_
COR
V
SS_LV_
COR
V
SS_LV_
COR
V
DD_LV_
COR
D[12]
H[13]
H[9]
G[6]
H
G[13]
V
SS_HV
_IO
C[4]
A[5]
V
DD_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
DD_LV
V
SS_LV
V
DD_HV
_REG_1
V
DD_HV
_FLA
H[6]
J
F[7]
G[15]
V
DD_HV
_REG_0
V
DD_HV
_REG_0
V
DD_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
DD_LV
V
DD_LV
V
DD_HV
_REG_1
V
SS_HV
_FLA
H[15]
K
F[9]
F[8]
C[7]
V
DD_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
DD_LV
NC
H[8]
H[7]
A[3]
L
F[10]
F[11]
D[9]
NC
V
DD_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
SS_LV
V
DD_LV
NC
TCK
H[4]
B[4]
M
V
DD_HV
_OSC
V
DD_HV
_IO
D[8]
NC
V
DD_LV
V
DD_LV
V
DD_LV
V
DD_LV
V
DD_LV
V
DD_LV
V
DD_LV
C[11]
B[5]
TMS
H[5]
N
XTAL
V
SS_HV
_IO
D[5]
V
SS_LV_
PLL
NC
C[12]
A[2]
G[5]
P
V
SS_HV
_OSC
RESET
D[6]
V
DD_LV_
PLL
V
DD_LV_
COR
V
SS_LV_
COR
B[8]
NC
V
SS_HV
_IO
V
DD_HV
_IO
B[14]
V
DD_LV_
COR
V
SS_LV_
COR
V
DD_HV
_IO
G[10]
G[8]
G[7]
R
EXTAL
FCCU
_F[0]
V
SS_HV
_IO
D[7]
B[7]
E[6]
V
DD_HV
_ADR0
B[10]
V
DD_HV
_ADR1
B[13]
B[15]
C[0]
BCTRL
A[1]
V
SS_HV
_IO
D[11]
G[9]
T
V
SS_HV
_IO
V
DD_HV
_IO
NC
C[1]
E[5]
E[7]
V
SS_HV
_ADR0
B[11]
V
SS_HV
_ADR1
E[9]
E[10]
E[12]
E[0]
A[0]
D[10]
V
DD_HV
_IO
V
SS_HV
_IO
U
V
SS_HV
_IO
V
SS_HV
_IO
NC
E[4]
C[2]
E[2]
B[9]
B[12]
V
DD_HV
_ADV
V
SS_HV
_ADV
E[11]
NC
NC
V
DD_HV
_PMU
G[11]
V
SS_HV
_IO
V
SS_HV
_IO
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17