Freescale Semiconductor TWR-AUDIO-SGTL Audio peripheral module with SGTL5000 codec TWR-AUDIO-SGTL TWR-AUDIO-SGTL 数据表
产品代码
TWR-AUDIO-SGTL
Freescale Semiconductor, Inc. reserves the right to change the detail specifications,
as may be required, to permit improvements in the design of its products.
as may be required, to permit improvements in the design of its products.
Document Number: SGTL5000
Rev. 6.0, 11/2013
Freescale Semiconductor
Technical Data
© Freescale Semiconductor, Inc., 2008-2013. All rights reserved.
Low Power Stereo Codec with
Headphone Amp
The SGTL5000 is a Low Power Stereo Codec with Headphone Amp
from Freescale, and is designed to provide a complete audio solution
for products needing LINEIN, MIC_IN, LINEOUT, headphone-out, and
digital I/O. Deriving it’s architecture from best in class, Freescale
integrated products that are currently on the market. The SGTL5000 is
able to achieve ultra low power with very high performance and
functionality, all in one of the smallest footprints available. Target
markets include media players, navigation devices, smart phones,
tablets, medical equipment, exercise equipment, consumer audio
equipment, etc. Features such as capless headphone design and an
internal PLL help lower overall system cost.
Features
Analog Inputs
• Stereo LINEIN - Support for external analog input
• Stereo LINEIN - Codec bypass for low power
• MIC bias provided
• Programmable MIC gain
• ADC - 85 dB SNR (-60 dB input) and -73 dB THD+N
• Stereo LINEIN - Support for external analog input
• Stereo LINEIN - Codec bypass for low power
• MIC bias provided
• Programmable MIC gain
• ADC - 85 dB SNR (-60 dB input) and -73 dB THD+N
(VDDA = 1.8 V)
Analog Outputs
• HP Output - Capless design
• HP Output - 62.5 mW max, 1.02 kHz sine into 16
• HP Output - Capless design
• HP Output - 62.5 mW max, 1.02 kHz sine into 16
load at 3.3 V
• HP Output - 100 dB SNR (-60 dB input) and -80 dB THD+N
(V
DDA
= 1.8 V, 16
load, DAC to headphone)
• LINEOUT - 100 dB SNR (-60 dB input) and -85 dB THD+N
(V
DDIO
= 3.3 V)
Digital I/O
• I
2
S port to allow routing to Application Processor
Integrated Digital Processing
• Freescale surround, Freescale bass, tone control/ parametric
equalizer/graphic equalizer clocking/control
• PLL allows input of an 8.0 MHz to 27 MHz system clock - standard
audio clocks are derived from PLL
Power Supplies
Power Supplies
• Designed to operate from 1.62 to 3.6 volts
Figure 1. SGTL5000 Simplified Application Diagram
AUDIO CODEC
SGTL5000
ORDERING INFORMATION
Device
Temperature
Range (T
A
)
Package
SGTL5000XNLA3/R2
-40 to 85 °C
20 QFN
SGTL5000XNAA3/R2
32 QFN
PB-FREE
98ARE10742D
20-PIN QFN
PB-FREE
98ARE10739D
32-PIN QFN
I2S
Interface
Headphone /
Line Out
w/ volume
Audio
Switch
ADC
DAC
I2S_DOUT
I2S_DIN
I2S_SCLK
I2S_LRCLK
LINEOUT_R
LINEOUT_L
HP_R
HP_L
I2C/SPI Control
SYS_MCLK
PLL
Application
Processor
Headphone
Speaker
Amp/Docking
Station/FMTX
Audio
Processing
Analog In
(Stereo
Line In,
Line In,
MIC)
LINEIN_R
LINEIN_L
MIC_IN
MIC_BIAS
MP3/FM Input
MIC IN/Speech
Recognition
I2S
Interface
Headphone /
Line Out
w/ volume
Audio
Switch
ADC
DAC
I2S_DOUT
I2S_DIN
I2S_SCLK
I2S_LRCLK
LINEOUT_R
LINEOUT_L
HP_R
HP_L
I2C/SPI Control
SYS_MCLK
PLL
Application
Processor
Headphone
Speaker
Amp/Docking
Station/FMTX
Audio
Processing
Analog In
(Stereo
Line In,
Line In,
MIC)
LINEIN_R
LINEIN_L
MIC_IN
MIC_BIAS
MP3/FM Input
MIC IN/Speech
Recognition
Note: SPI is not supported in the 3.0 mm x 3.0 mm 20-pin QFN package