Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 数据表

产品代码

DEMO9S08DZ60

Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)

MC9S08DZ60 Series Data Sheet, Rev. 4

146

Freescale Semiconductor

8.4

Functional Description

8.4.1

Operational Modes

Figure 8-8. Clock Switching Modes

Entered from any state
when MCU enters stop

Returns to state that was active
before MCU entered stop, unless
RESET occurs while in stop.

Stop

PLL Bypassed
External (PBE)

PLL Engaged
External (PEE)

FLL Engaged
External (FEE)

FLL Engaged
Internal (FEI)

FLL Bypassed
External (FBE)

FLL Bypassed
Internal (FBI)

IREFS=1
CLKS=00
PLLS=0

IREFS=0
CLKS=00
PLLS=0

IREFS=1
CLKS=01
PLLS=0

IREFS=0
CLKS=10
PLLS=0

IREFS=0
CLKS=00
PLLS=1

IREFS=0
CLKS=10
PLLS=1

IREFS=0
CLKS=10
BDM Disabled
and LP=1

IREFS=1
CLKS=01
PLLS=0
BDM Disabled
and LP=1

Bypassed

Low Power

Internal (BLPI)

Bypassed

Low Power

External (BLPE)

BDM Enabled
or LP=0