Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 数据表
产品代码
DEMO9S08DZ60
Chapter 6 Parallel Input/Output Control
MC9S08DZ60 Series Data Sheet, Rev. 4
90
Freescale Semiconductor
6.5.1
Port A Registers
Port A is controlled by the registers listed below.
6.5.1.1
Port A Data Register (PTAD)
6.5.1.2
Port A Data Direction Register (PTADD)
7
6
5
4
3
2
1
0
R
PTAD7
PTAD6
PTAD5
PTAD4
PTAD3
PTAD2
PTAD1
PTAD0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-3. Port A Data Register (PTAD)
Table 6-1. PTAD Register Field Descriptions
Field
Description
7:0
PTAD[7:0]
Port A Data Register Bits — For port A pins that are inputs, reads return the logic level on the pin. For port A
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port A pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
pins that are configured as outputs, reads return the last value written to this register.
Writes are latched into all bits of this register. For port A pins that are configured as outputs, the logic level is
driven out the corresponding MCU pin.
Reset forces PTAD to all 0s, but these 0s are not driven out the corresponding pins because reset also configures
all port pins as high-impedance inputs with pull-ups/pull-downs disabled.
7
6
5
4
3
2
1
0
R
PTADD7
PTADD6
PTADD5
PTADD4
PTADD3
PTADD2
PTADD1
PTADD0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-4. Port A Data Direction Register (PTADD)
Table 6-2. PTADD Register Field Descriptions
Field
Description
7:0
PTADD[7:0]
Data Direction for Port A Bits — These read/write bits control the direction of port A pins and what is read for
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.
PTAD reads.
0 Input (output driver disabled) and reads return the pin value.
1 Output driver enabled for port A bit n and PTAD reads return the contents of PTADn.