Freescale Semiconductor DEMO9S08DZ60 Demo Board DEMO9S08DZ60 DEMO9S08DZ60 数据表
产品代码
DEMO9S08DZ60
Chapter 6 Parallel Input/Output Control
MC9S08DZ60 Series Data Sheet, Rev. 4
Freescale Semiconductor
95
6.5.2.3
Port B Pull Enable Register (PTBPE)
NOTE
Pull-down devices only apply when using pin interrupt functions, when
corresponding edge select and pin select functions are configured.
corresponding edge select and pin select functions are configured.
6.5.2.4
Port B Slew Rate Enable Register (PTBSE)
Note: Slew rate reset default values may differ between engineering samples and final production parts. Always initialize slew
rate control to the desired value to ensure correct operation.
7
6
5
4
3
2
1
0
R
PTBPE7
PTBPE6
PTBPE5
PTBPE4
PTBPE3
PTBPE2
PTBPE1
PTBPE0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-13. Internal Pull Enable for Port B Register (PTBPE)
Table 6-11. PTBPE Register Field Descriptions
Field
Description
7:0
PTBPE[7:0]
Internal Pull Enable for Port B Bits — Each of these control bits determines if the internal pull-up or pull-down
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
device is enabled for the associated PTB pin. For port B pins that are configured as outputs, these bits have no
effect and the internal pull devices are disabled.
0 Internal pull-up/pull-down device disabled for port B bit n.
1 Internal pull-up/pull-down device enabled for port B bit n.
7
6
5
4
3
2
1
0
R
PTBSE7
PTBSE6
PTBSE5
PTBSE4
PTBSE3
PTBSE2
PTBSE1
PTBSE0
W
Reset:
0
0
0
0
0
0
0
0
Figure 6-14. Slew Rate Enable for Port B Register (PTBSE)
Table 6-12. PTBSE Register Field Descriptions
Field
Description
7:0
PTBSE[7:0]
Output Slew Rate Enable for Port B Bits — Each of these control bits determines if the output slew rate control
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.
is enabled for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Output slew rate control disabled for port B bit n.
1 Output slew rate control enabled for port B bit n.