Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册
![Freescale Semiconductor](https://files.manualsbrain.com/attachments/3bb6ed54ced79535c16e15272d951c615eff7542/common/fit/150/50/1f2ce9b696676e671c4a5e26a6d7f7adf81e5b28c3d837b6200a14eeaf20/brand_logo.gif)
产品代码
DEMO9S12XHY256
Memory Mapping Control (S12XMMCV4)
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
175
In single-chip modes accesses by the CPU (except for firmware commands) to any of the unimplemented
areas (see
areas (see
) will result in an illegal access reset (system reset) in case of no MPU error. BDM
accesses to the unimplemented areas are allowed but the data will be undefined.No misaligned word access
from the BDM module will occur; these accesses are blocked in the BDM module (Refer to BDM Block
Guide).
from the BDM module will occur; these accesses are blocked in the BDM module (Refer to BDM Block
Guide).
Misaligned word access to the last location of RAM is performed but the data will be undefined.
Misaligned word access to the last location of any global page (64KB) by any global instruction, is
performed by accessing the last byte of the page and the first byte of the same page, considering the above
mentioned misaligned access cases.
performed by accessing the last byte of the page and the first byte of the same page, considering the above
mentioned misaligned access cases.