Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册
产品代码
DEMO9S12XHY256
Interrupt (S12XINTV2)
MC9S12XHY-Family Reference Manual, Rev. 1.04
186
Freescale Semiconductor
4.3.2
Register Descriptions
This section describes in address order all the XINT module registers and their individual bits.
Address
Register
Name
Bit 7
6
5
4
3
2
1
Bit 0
0x0121
IVBR
R
IVB_ADDR[7:0]7
W
0x0126
INT_XGPRIO
R
0
0
0
0
0
XILVL[2:0]
W
0x0127
INT_CFADDR
R
INT_CFADDR[7:4]
0
0
0
0
W
0x0128
INT_CFDATA0
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x0129
INT_CFDATA1
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012A INT_CFDATA2
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012B INT_CFDATA3
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012C INT_CFDATA4
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012D INT_CFDATA5
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012E INT_CFDATA6
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
0x012F
INT_CFDATA7
R
RQST
0
0
0
0
PRIOLVL[2:0]
W
= Unimplemented or Reserved
Figure 4-2. XINT Register Summary