Freescale Semiconductor Demonstration Board for Freescale MC9S12XHY256 Microcontroller DEMO9S12XHY256 DEMO9S12XHY256 用户手册
产品代码
DEMO9S12XHY256
Port Integration Module (S12XHYPIMV1)
MC9S12XHY-Family Reference Manual, Rev. 1.04
Freescale Semiconductor
87
2.3.4
Port B Data Register (PORTB)
2.3.5
Port A Data Direction Register (DDRA)
Address 0x0001 (PRR)
Access: User read/write
1
1
Read: Anytime. The data source is depending on the data direction value.
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB7
W
Altern.
Function
BP3
BP2
BP1
BP0
FP39
FP38
FP37
FP28
Reset
0
0
0
0
0
0
0
0
Figure 2-2. Port B Data Register (PORTB)
Table 2-5. PORTB Register Field Descriptions
Field
Description
7-0
PB
Port B general purpose input/output data—Data Register, LCD segment driver output
The associated pin can be used as general purpose I/O when not used as alternative function. In general purpose
output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns
the value of the port register bit, otherwise the buffered pin input state is read.
• The LCD segment driver output takes precedence over the general purpose I/O function if the related LCD
The associated pin can be used as general purpose I/O when not used as alternative function. In general purpose
output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns
the value of the port register bit, otherwise the buffered pin input state is read.
• The LCD segment driver output takes precedence over the general purpose I/O function if the related LCD
segment is enabled.
Address 0x0002 (PRR)
Access: User read/write
1
1
Read: Anytime
Write: Anytime
Write: Anytime
7
6
5
4
3
2
1
0
R
DDRA7
DDRA6
DDRA5
DDRA4
DDRA3
DDRA2
DDRA1
DDRA0
W
Reset
0
0
0
0
0
0
0
0
Figure 2-3. Port A Data Direction Register (DDRA)