Freescale Semiconductor Starter Kit for MC9S12G TRK-USB-S12G128 TRK-USB-S12G128 数据表
产品代码
TRK-USB-S12G128
Digital Analog Converter (DAC_8B5V)
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
579
The DAC resistor network itself can work on two different voltage ranges:
shows the control signal decoding for each mode. For more detailed mode description see the
sections below.
17.5.2
Mode “Off”
The “Off” mode is the default mode after reset and is selected by DACCTL.DACM[2:0] = 0x0. During this
mode the DAC resistor network and the operational amplifier are disabled and all switches are open. This
mode provides the lowest power consumption. For decoding of the control signals see
mode the DAC resistor network and the operational amplifier are disabled and all switches are open. This
mode provides the lowest power consumption. For decoding of the control signals see
.
17.5.3
Mode “Operational Amplifier”
The “Operational Amplifier” mode is selected by DACCTL.DACM[2:0] = 0x1. During this mode the
operational amplifier can be used independent from the DAC resister network. All required amplifier
signals, AMP, AMPP and AMPM are available on the pins. The DAC resistor network output is
disconnected from the DACU pin. The connection between the amplifier output and the negative amplifier
input is open. For decoding of the control signals see
operational amplifier can be used independent from the DAC resister network. All required amplifier
signals, AMP, AMPP and AMPM are available on the pins. The DAC resistor network output is
disconnected from the DACU pin. The connection between the amplifier output and the negative amplifier
input is open. For decoding of the control signals see
Operational amplifier
001
disabled
enabled
disabled
depend on AMPP
and AMPM input
Unbuffered DAC
100
enabled
disabled
unbuffered resistor
output voltage
disconnected
Unbuffered DAC with
Operational amplifier
101
enabled
enabled
unbuffered resistor
output voltage
depend on AMPP
and AMPM input
Buffered DAC
111
enabled
enabled
disconnected
buffered resistor
output voltage
Table 17-6. DAC Resistor Network Voltage ranges
DAC Mode
Description
Full Voltage Range (FVR)
DAC resistor network provides a output voltage over the complete input voltage range,
default after reset
default after reset
Reduced Voltage Range
DAC resistor network provides a output voltage over a reduced input voltage range
Table 17-7. DAC Control Signals
DACM
DAC resistor
network
Operational
Amplifier
Switch S1
Switch S2
Switch S3
Off
000
disabled
disabled
open
open
open
Operational amplifier
001
disabled
enabled
closed
open
open
Unbuffered DAC
100
enabled
disabled
open
open
closed
Unbuffered DAC with
Operational amplifier
101
enabled
enabled
closed
open
closed
Buffered DAC
111
enabled
enabled
open
closed
open
Table 17-5. DAC Modes of Operation