Freescale Semiconductor Tower System Module S12G240 TWR-S12G240 TWR-S12G240 数据表
产品代码
TWR-S12G240
Electrical Characteristics
MC9S12G Family Reference Manual, Rev.1.23
Freescale Semiconductor
1235
Figure A-4. Jitter Definitions
The relative deviation of t
nom
is at its maximum for one clock period, and decreases towards zero for larger
number of clock periods (N).
Defining the jitter as:
For N < 100, the following equation is a good fit for the maximum jitter:
Figure A-5. Maximum Bus Clock Jitter Approximation
NOTE
On timers and serial modules a prescaler will eliminate the effect of the jitter
to a large extent.
to a large extent.
2
3
N-1
N
1
0
t
nom
t
max1
t
min1
t
maxN
t
minN
J N
( )
max 1
t
max
N
( )
N t
nom
⋅
-----------------------
–
1
t
min
N
( )
N t
nom
⋅
-----------------------
–
,
⎝
⎠
⎜
⎟
⎛
⎞
=
J N
( )
j
1
N
--------
=
1
5
10
20
N
J(N)