Analog Devices AD5629 Evaluation Board EVAL-AD5629RSDZ EVAL-AD5629RSDZ 数据表
产品代码
EVAL-AD5629RSDZ
AD5629R/AD5669R
Data Sheet
OUTLINE DIMENSIONS
2.70
2.60 SQ
2.50
2.60 SQ
2.50
COMPLIANT
TO JEDEC STANDARDS MO-220-WGGC.
1
0.65
BSC
BOTTOM VIEW
TOP VIEW
16
5
8
9
12
13
4
EXPOSED
PAD
PIN 1
INDICATOR
INDICATOR
4.10
4.00 SQ
3.90
4.00 SQ
3.90
0.45
0.40
0.35
0.40
0.35
SEATING
PLANE
0.80
0.75
0.70
0.75
0.70
0.05 MAX
0.02 NOM
0.02 NOM
0.20 REF
0.20 MIN
COPLANARITY
0.08
PIN 1
INDICATOR
0.35
0.30
0.25
0.30
0.25
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
0
8
-1
6
-2
0
1
0
-C
Figure 56. 16-Lead Lead Frame Chip Scale Package [LFCSP_WQ]
4 mm × 4 mm Body, Very Very Thin Quad
(CP-16-17)
Dimensions shown in millimeters
16
9
8
1
PIN 1
SEATING
PLANE
PLANE
8°
0°
0°
4.50
4.40
4.30
4.40
4.30
6.40
BSC
5.10
5.00
4.90
5.00
4.90
0.65
BSC
0.15
0.05
0.05
1.20
MAX
MAX
0.20
0.09
0.09
0.75
0.60
0.45
0.60
0.45
0.30
0.19
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 57. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
Rev. C | Page 28 of 32