Analog Devices AD9609 Evaluation Board AD9609-40EBZ AD9609-40EBZ 数据表
产品代码
AD9609-40EBZ
AD9609
Rev. 0 | Page 4 of 32
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 1.8 V; DRVDD = 1.8 V, maximum sample rate, 2 V p-p differential input, 1.0 V internal reference; AIN = −1.0 dBFS, 50% duty
cycle clock, DCS disabled, unless otherwise noted.
cycle clock, DCS disabled, unless otherwise noted.
Table 1.
Parameter Temp
AD9609-20/AD9609-40 AD9609-65 AD9609-80
Unit
Min Typ
Max
Min Typ Max Min Typ Max
RESOLUTION
Full
10
10
10
Bits
ACCURACY
No Missing Codes
Full
Guaranteed
Guaranteed
Guaranteed
Offset
Error
Full
−0.45
+0.05 +0.55 −0.45 +0.05 +0.55 −0.45 +0.05 +0.55 %
FSR
Full
−1.5
−1.5
−1.5
%
FSR
Differential Nonlinearity (DNL)
±0.15/±0.25
±0.25
±0.25
LSB
25°C
±0.05/±0.08
±0.15
±0.07
LSB
Integral Nonlinearity (INL)
Full
±0.35 ±0.45
±0.45
LSB
25°C
±0.15
±0.15
±0.15
LSB
TEMPERATURE
DRIFT
Offset
Error
Full
±2
±2
±2
ppm/°C
INTERNAL
VOLTAGE
REFERENCE
Output Voltage (1 V Mode)
Full
0.984
0.996
1.008 0.984
0.996
1.008 0.984 0.996 1.008 V
Load Regulation Error at 1.0 mA
Full
2
2
2
mV
INPUT-REFERRED
NOISE
VREF = 1.0 V
25°C
0.06
0.08
0.08
LSB rms
ANALOG
INPUT
Input Span, VREF = 1.0 V
Full
2
2
2
V p-p
Input Capacitance
Full
6
6
6
pF
Input
Common-Mode
Voltage Full
0.9
0.9
0.9
V
Input Common-Mode Range
Full
0.5
1.3
0.5
1.3 0.5
1.3 V
REFERENCE INPUT RESISTANCE
Full
7.5
7.5
7.5
kΩ
POWER SUPPLIES
Supply Voltage
AVDD
Full
1.7
1.8 1.9 1.7 1.8 1.9 1.7 1.8 1.9 V
DRVDD Full
1.7
3.6
1.7
3.6 1.7
3.6 V
Supply Current
Full
24.9/29.7
27.0/32.0
37.1
39.5
41.8
45
mA
Full
1.4/2.2
3.6
4.3
mA
Full
2.5/4.1
6.6
7.9
mA
POWER
CONSUMPTION
DC
Input
Full
45.2/54.7
67.7
76.3
mW
(DRVDD = 1.8 V)
Full
46.3/57.4
52.0/61.0
73.3
78.0
83.0
92
mW
(DRVDD = 3.3 V)
Full
53.1/67.0
88.6
89.5
mW
Standby Power
Full
34
34
34
mW
Power-Down
Power
Full
0.5
0.5
0.5
mW
1
Measured with 1.0 V external reference.
2
Measured with a 10 MHz input frequency at rated sample rate, full-scale sine wave, with approximately 5 pF loading on each output bit.
3
Input capacitance refers to the effective capacitance between one differential input pin and AGND.
4
Standby power is measured with a dc input and the CLK active.