Analog Devices AD5144 Evaluation Board EVAL-AD5144DBZ EVAL-AD5144DBZ 数据表
产品代码
EVAL-AD5144DBZ
Evaluation Board User Guide
UG-469
Rev. 0 | Page 15 of 20
DAUGHTER BOARD
11006-
018
V
DD
V
L
OGIC
C4
C3
0.
1u
F
10u
F
0.
1u
F
10u
F
+
C2
C1
+
RESET
WP
LRDAC
DIS
INDE
P
V
DD
VSS
DG
ND
AG
ND
VL
OGIC
VSS
VDD
DG
ND
V
L
OGIC
ADDR0
B
A
0
ADDR0
1
0
1
DG
ND
V
L
OGIC
ADDR1
B
A
ADDR1
W1
V
DD
VSS
WP
R
ESET
L
RDAC
S
DA|
DI
N
S
CL
|S
CL
K
ADDR1
|S
DO
ADDR0
|S
Y
NC
G
ND
V
L
OGIC
DI
S
B1
A1
W2
B2
A2
W3
B3
A3
W4
B4
A4
W1
B1
A1
W2
B2
A2
W3
B3
A3
W4
B4
A4
U1
A
D
5142
2
3
4
9
10
11
5
6
7
12
13
14
15
16
18
17
19
22
21
23
24
20
1
8
J1-
1
J1-
2
J1-
3
J1-
4
J1-
5
J1-
6
J1-
8
J1-
7
ADDR0
ADDR1
S
DA
J3-1
J3-2
J3-3
J3-4
J3-5
J2-
1
J2-
3
J2-
5
J2-
7
J2-
11
J2-
9
J2-
2
J2-
4
J2-
6
J2-
8
J2-
12
J2-
10
A1
W1
B1
A2
B2
W2
A3
W3
B3
A4
B4
W4
J4-1
J4-2
J4-3
J4-4
J4-5
S
CL
SYN
C
S
DO
S
CL
K
S
DI
S
DA|
DI
N
S
DA
DI
N
S
CL
|S
CL
K
12
13
14
10
11
6
5
3
2
16
9
7
4
8
S
CL
S
CL
K
V
L
OGIC
ADDR1
|S
DO
ADDR0
|S
Y
NC
EN
IN
1
A1
A
B
15
ADDR1
S
DO
S3
B
S3
A
S2
B
S2
A
S1
B
S1
A
D4
D3
D2
D1
S4
B
S4
A
DG
ND
G
ND
V
DD
U2
ADG
7
7
4
DG
ND
DG
ND
V
L
OGIC
I2C
SPI
DI
S
ADDR0
SYN
C
VSS
WP
R
ESET
L
RDAC
S
DA|
DI
N
S
CL
|S
CL
K
ADDR1
|S
DO
ADDR0
|S
Y
NC
DG
ND
V
L
OGIC
DI
S
Figure 19. Schematic of Daughter Board