Atmel MCU Evaluation Kit AT32UC3L-EK AT32UC3L-EK 数据表
产品代码
AT32UC3L-EK
Atmel AVR32025
15
32150B-AVR-03/12
QFP48 pin
GPIO
GPIO alternate functions
Feature
14 PA01
None
JTAG.TMS
13 PA02
None
JTAG.TDO
4 PA03
None
JTAG.TDI
22 N.A.
N.A.
RESET_N pin. Used when
enabling/disabling the JTAG or the
aWire interface. Also, the aWire data
is multiplexed on this pin
enabling/disabling the JTAG or the
aWire interface. Also, the aWire data
is multiplexed on this pin
3.3.4 Configuration and test points
3.3.4.1 Special considerations for the RESET_N pin and the JTAG pins
On the Atmel AVR UC3 L0 series, the RESET_N pin is used to enable/disable the
JTAG interface or the aWire interface. For this reason, the RESET_N pin should not
be connected to an external reset circuit to avoid drive contention and speed
problems. To avoid this issue with the RST pushbutton, the 0Ω R36 resistor is not
mounted by default.
JTAG interface or the aWire interface. For this reason, the RESET_N pin should not
be connected to an external reset circuit to avoid drive contention and speed
problems. To avoid this issue with the RST pushbutton, the 0Ω R36 resistor is not
mounted by default.
On the AVR UC3 L0 series, the JTAG TMS, TDI, TDO, and TCK pins are multiplexed
with I/O lines. While using these multiplexed JTAG lines, all normal peripheral activity
on these lines is disabled. The user must make sure that no external peripheral is
blocking the JTAG lines while debugging.
with I/O lines. While using these multiplexed JTAG lines, all normal peripheral activity
on these lines is disabled. The user must make sure that no external peripheral is
blocking the JTAG lines while debugging.
, highlights the components on
the Atmel AT32UC3L-EK that might interfere with the multiplexed JTAG pins. These
components must not be used while debugging with the JTAG interface. Another way
to say this is that debugging over the JTAG interface will not work if there is any
external signal activity over these components.
components must not be used while debugging with the JTAG interface. Another way
to say this is that debugging over the JTAG interface will not work if there is any
external signal activity over these components.
Table 3-8. Conflict conditions over the debugging pins.
QFP48 pin
GPIO
Conflict conditions
11 PA00
If the WLESS J8 connector is configured with a jumper on J44.3-5,
signal activities over J8.1 will conflict with JTAG.TCK
signal activities over J8.1 will conflict with JTAG.TCK
14 PA01
If the WLESS J8 connector is configured with a jumper on J44.4-6,
signal activities over J8.2 will conflict with JTAG.TMS
signal activities over J8.2 will conflict with JTAG.TMS
13
PA02
No possible conflicts with JTAG.TDO
4 PA03
•
Signal activities over J8.5 will conflict with JTAG.TDI
•
If the Power-Off signal is enabled (refer to Section
, in the Power supply interface
chapter), the power supply hardware block or any software
activity on the PA03 pin will conflict with JTAG.TDI
activity on the PA03 pin will conflict with JTAG.TDI
22 N.A.
If the 0Ω R36 resistor is mounted, the effect of C4 will conflict with
the RESET_N pin
the RESET_N pin
To summarize, debugging will not work if:
• The WLESS connector is used
• The Power-Off signal is enabled by hardware (refer to Section
• The Power-Off signal is enabled by hardware (refer to Section
,
) and the software running on the Atmel AT32UC3L064 toggles
PA03