Linear Technology DC1041A-B - LTM4601HV Demo Board | 28VIN, 12A Step-Down μModule Regulator DC1041A-B DC1041A-B 数据表
产品代码
DC1041A-B
LT4356
3
Sm all Turrets
N o connection to any of the small turrets is necessary
to make the board operate--the LT4356-2 defaults to
the O N state.
SH D N # is pulled high internally. If this turret is left
open, the board will turn on when power is applied.
Short this turret to ground to turn off the LT4356-2.
FLT# pulls low after a TM R interval if there is a sus-
tained input overvoltage, and does so 2ms before the
output shuts down. O therwise FLT# is high, pulled up
by LED 4 and the 5V LED Supply.
EN is an output. It goes high when the 12V output rises
to within 700mV of the input. EN is latched and does
not pull low again until the LT4356-2 trips off from a
sustained overvoltage or is shut down. EN is pulled up
to the output through a 3.9kilo-ohm resistor, and is
shunted by LED5. Use EN to enable downstream cir-
cuitry.
Input Overvoltages and Bench Testing
The LT4356-2 is designed to block transient voltages
and surges from reaching load circuitry of limited volt-
age capability. This has a profound impact on the volt-
age rating of downstream components as well as to-
pology where dc-to-dc converters are concerned, not
to mention elimination of bulky input filter inductors
and capacitors.
To this end, Q1 is selected for a 3A application where
the surges and transients are consistent with an auto-
motive environment.
Sustained dc overvoltage conditions are not part of the
automotive environment, and in the standard circuit
configuration Q 1 would likely overheat from continu-
ous autoretry if, for example, 60Vdc was applied to the
input. Yet a 60Vdc input is a likely event during initial
bench testing.
An O vervoltage Lockout circuit has been included on
the demo board to prevent M O SFET destruction during
N o connection to any of the small turrets is necessary
to make the board operate--the LT4356-2 defaults to
the O N state.
SH D N # is pulled high internally. If this turret is left
open, the board will turn on when power is applied.
Short this turret to ground to turn off the LT4356-2.
FLT# pulls low after a TM R interval if there is a sus-
tained input overvoltage, and does so 2ms before the
output shuts down. O therwise FLT# is high, pulled up
by LED 4 and the 5V LED Supply.
EN is an output. It goes high when the 12V output rises
to within 700mV of the input. EN is latched and does
not pull low again until the LT4356-2 trips off from a
sustained overvoltage or is shut down. EN is pulled up
to the output through a 3.9kilo-ohm resistor, and is
shunted by LED5. Use EN to enable downstream cir-
cuitry.
Input Overvoltages and Bench Testing
The LT4356-2 is designed to block transient voltages
and surges from reaching load circuitry of limited volt-
age capability. This has a profound impact on the volt-
age rating of downstream components as well as to-
pology where dc-to-dc converters are concerned, not
to mention elimination of bulky input filter inductors
and capacitors.
To this end, Q1 is selected for a 3A application where
the surges and transients are consistent with an auto-
motive environment.
Sustained dc overvoltage conditions are not part of the
automotive environment, and in the standard circuit
configuration Q 1 would likely overheat from continu-
ous autoretry if, for example, 60Vdc was applied to the
input. Yet a 60Vdc input is a likely event during initial
bench testing.
An O vervoltage Lockout circuit has been included on
the demo board to prevent M O SFET destruction during
bench testing. This operates by pulling up on the TM R
pin and preventing autoretry when the input voltage
exceeds approximately 18V.
If the board is only subjected to surges and transients,
the Overvoltage Lockout circuit is unnecessary and in
fact plays a nuisance-to-nothing role. Remove R 16 to
defeat the O vervoltage Lockout circuit function.
D C1018B-B is designed to ride through input tran-
sients of 1 or 2ms duration, but will shut down during
load dump. Q 1 must dissipate significant energy to
support a 3A load during load dump, so a larger
M O SFET is necessary if Q 1 is to survive. CTM R must
be increased to accommodate the proposed time inter-
val if this modification is contemplated.
Locally Generated Drain Spikes
W hen an input transient waveform is applied to an op-
erating LT4356-2, the M O SFET is fully on and a large
magnitude displacement current flows into the load
capacitors, CL1 and CL2 (collectively, CL) and any
other off-board load capacitors. The LT4356-2 has a
relatively soft current limit amplifier to prevent detec-
tion of current pulses generated by noise spikes. This
soft response prevents the LT4356-2 from responding
to the initial current surge in CL.
The current surge is limited only by the feedpoint im-
pedance of the supply, the transient rising slew rate
and the capacitance and ESR of CL. The current surge
is commutated by the M O SFET once CL charges to
Vgate-Vthreshold, and results in a wide-bandwidth
voltage spike at the input, limited only by the break-
down of input clamp D CL. W ithout D CL the input volt-
age could easily exceed 100V and destroy the LT4356-
2.
U nder normal conditions (typical automotive transients
and surges) the input rise time is 10µs or more, and
the CL displacement current is moderate. D rain spikes
are thereby limited in amplitude.
W hen bench testing, input rise times may easily reach
100ns creating an environment for destructive drain
pin and preventing autoretry when the input voltage
exceeds approximately 18V.
If the board is only subjected to surges and transients,
the Overvoltage Lockout circuit is unnecessary and in
fact plays a nuisance-to-nothing role. Remove R 16 to
defeat the O vervoltage Lockout circuit function.
D C1018B-B is designed to ride through input tran-
sients of 1 or 2ms duration, but will shut down during
load dump. Q 1 must dissipate significant energy to
support a 3A load during load dump, so a larger
M O SFET is necessary if Q 1 is to survive. CTM R must
be increased to accommodate the proposed time inter-
val if this modification is contemplated.
Locally Generated Drain Spikes
W hen an input transient waveform is applied to an op-
erating LT4356-2, the M O SFET is fully on and a large
magnitude displacement current flows into the load
capacitors, CL1 and CL2 (collectively, CL) and any
other off-board load capacitors. The LT4356-2 has a
relatively soft current limit amplifier to prevent detec-
tion of current pulses generated by noise spikes. This
soft response prevents the LT4356-2 from responding
to the initial current surge in CL.
The current surge is limited only by the feedpoint im-
pedance of the supply, the transient rising slew rate
and the capacitance and ESR of CL. The current surge
is commutated by the M O SFET once CL charges to
Vgate-Vthreshold, and results in a wide-bandwidth
voltage spike at the input, limited only by the break-
down of input clamp D CL. W ithout D CL the input volt-
age could easily exceed 100V and destroy the LT4356-
2.
U nder normal conditions (typical automotive transients
and surges) the input rise time is 10µs or more, and
the CL displacement current is moderate. D rain spikes
are thereby limited in amplitude.
W hen bench testing, input rise times may easily reach
100ns creating an environment for destructive drain