Linear Technology LTC2634-LZ12: 12-Bit Quad Vout DAC, (Req DC590) DC1488A-A DC1488A-A 数据表
产品代码
DC1488A-A
LTC2634
0
2634fc
operation
C3
COMMAND
Input Word (LTC2634-12)
ADDRESS
DATA (12 BITS + 4 DON’T CARE BITS)
C2 C1 C0 A3 A2 A1 A0
D9
D10
D11
D8 D7 D6 D5 D4 D3 D2 D1 D0
X
X
X
X
MSB
LSB
C3
COMMAND
Input Word (LTC2634-10)
ADDRESS
DATA (10 BITS + 6 DON’T CARE BITS)
C2 C1 C0 A3 A2 A1 A0
D7
D8
D9
D6 D5 D4 D3 D2 D1 D0 X
X
X
X
X
X
MSB
LSB
C3
COMMAND
Input Word (LTC2634-8)
ADDRESS
DATA (8 BITS + 8 DON’T CARE BITS)
C2 C1 C0 A3 A2 A1 A0
D5
D6
D7
D4 D3 D2 D1 D0 X
X
X
X
X
X
X
X
MSB
LSB
2634 F02
Table 1. Command Codes
COMMAND*
C3
C2
C1
C0
0
0
0
0 Write to Input Register n
0
0
0
1 Update (Power Up) DAC Register n
0
0
1
0 Write to Input Register n, Update (Power Up) All
0
0
1
1 Write to and Update (Power Up) DAC Register n
0
1
0
0 Power-Down DAC n
0
1
0
1 Power-Down Chip (All DACs and Reference)
0
1
1
0 Select Internal Reference (Power-Up Reference)
0
1
1
1 Select External Reference (Power-Down Internal
Reference)
1
1
1
1 No Operation
*Command codes not shown are reserved and should not be used.
Table 2. Address Codes
ADDRESS (n)*
A3
A2
A1
A0
0
0
0
0 DAC A
0
0
0
1 DAC B
0
0
1
0 DAC C
0
0
1
1 DAC D
1
1
1
1 All DACs
* Address codes not shown are reserved and should not be used.
Figure 2. Command and Data Input Format
of CS/LD. The rising edge of CS/LD ends the data transfer
and causes the device to execute the command specified
in the 24-bit input sequence. The complete sequence is
shown in Figure 3a.
The command (C3-C0) and address (A3-A0) assignments
The command (C3-C0) and address (A3-A0) assignments
are shown in Tables 1 and 2. The first four commands
in Table 1 consist of write and update operation. A write
operation loads a 16-bit data word from the 24-bit shift
register into the input register of the selected DAC, n. An
update operation copies the data word from the input
register to the DAC register. Once copied into the DAC
register, the data word becomes the active 12-, 10- or
8-bit input code, and is converted to an analog voltage at
the DAC output. Write to and update combines the first
two commands. The update operation also powers up the
DAC if it had been in power-down mode. The data path
and registers are shown in the Block Diagram.