Linear Technology DC1110A - LTC2751-16: 16-bit, Single, SoftSpan, 1LSB INL Iout DAC, req. DC590 DC1110A DC1110A 数据表
产品代码
DC1110A
LTC2751
14
2751fa
operaTion
is a two-function pin. The update function is disabled when
READ is high, and the UPD pin instead selects the input
or DAC register for readback. Table 1 shows the readback
functions for the LTC2751.
The most common readback task is to check the contents
The most common readback task is to check the contents
of an input register after writing to it, before updating the
new data to the DAC register. To do this, bring READ high
while holding UPD low. The contents of the selected port’s
input register are output by the data or span I/O pins.
To read back the contents of a DAC register, bring READ
To read back the contents of a DAC register, bring READ
high, then bring UPD high. The contents of the selected
data or span DAC register are output by the data or span
I/O pins. Note: if no update is desired after the readback
operation, UPD must be returned low before bringing
READ low, otherwise the UPD pin will revert to its primary
function and update the DAC.
System Offset Adjustment
Many systems require compensation for overall system
Many systems require compensation for overall system
offset. The R
VOS
offset adjustment pin is provided for this
purpose. For noise immunity and ease of adjustment, the
control voltage is attenuated to the DAC output:
V
V
OS
= –0.01 • V(R
VOS
) [0V to 5V, ±2.5V spans]
V
OS
= –0.02 • V(R
VOS
) [0V to 10V, ±5V,
–2.5V to 7.5V spans]
V
V
OS
= –0.04 • V(R
VOS
) [±10V span]
The nominal input range of this pin is ±5V; other refer-
ence voltages of up to ±15V may be used if needed. The
R
VOS
pin has an input impedance of 1M
W. To preserve the
settling performance of the LTC2751, this pin should be
driven with a Thevenin-equivalent impedance of 10k
W or
less. If not used, R
VOS
should be shorted to I
OUT2
.
Table 2. Span Codes
S2
S1
S0
SPAN
0
0
0
Unipolar 0V to 5V
0
0
1
Unipolar 0V to 10V
0
1
0
Bipolar –5V to 5V
0
1
1
Bipolar –10V to 10V
1
0
0
Bipolar –2.5V to 2.5V
1
0
1
Bipolar –2.5V to 7.5V
Codes not shown are reserved and should not be used.
Readback
The contents of any one of the four interface registers can
The contents of any one of the four interface registers can
be read back by using the READ pin in conjunction with
the D/S and UPD pins.
A readback operation is initiated by bringing READ to logic
A readback operation is initiated by bringing READ to logic
high. The I/O pins, which are high-impedance digital inputs
when READ is low, selectively change to low-impedance
logic outputs during readback.
The I/O pins comprise two ports, data and span. The data
The I/O pins comprise two ports, data and span. The data
I/O port consists of pins D0-D11, D0-D13 or D0-D15
(LTC2751-12, LTC2751-14 or LTC2751-16, respectively).
The span I/O port consists of pins S0, S1 and S2 for all
parts.
Each I/O port has one dedicated input register and one
Each I/O port has one dedicated input register and one
dedicated DAC register. The register structure is shown
in the Block Diagram.
The D/S pin is used to select which I/O port (data or span)
The D/S pin is used to select which I/O port (data or span)
is configured to read back the contents of its registers. The
unselected I/O port’s pins remain high-impedance inputs.
Once the I/O port is selected, its input or DAC register is
Once the I/O port is selected, its input or DAC register is
selected for readback by using the UPD pin. Note that UPD